PEF82902FV11XP Lantiq, PEF82902FV11XP Datasheet - Page 137

• Manufacturer Part Number: PEF82902FV11XP
• Manufacturer: Lantiq

Specifications of PEF82902FV11XP

• Lead Free Status / Rohs Status: Supplier Unconfirmed

CODR0
CIC0
CIC1
S/G
BAS
Note: The CODR0 bits are updated every time a new C/I-code is detected in two
Data Sheet
consecutive IOM-frames. If several consecutive valid new codes are detected and
CIR0 is not read, only the first and the last C/I code are made available in CIR0 at
the first and second read of that register.
C/I0 Code Receive
Value of the received Command/Indication code. A C/I-code is loaded in
CODR0 only after being the same in two consecutive IOM-frames and the
previous code has been read from CIR0.
C/I0 Code Change
0 =
1 =
C/I1 Code Change
0 =
1 =
Stop/Go Bit Monitoring
Indicates the availability of the upstream D-channel;
0 =
1 =
Bus Access Status
Indicates the state of the TIC-bus:
0 =
1 =
No change in the received Command/Indication code has been
recognized
A change in the received Command/Indication code has been
recognized. This bit is set only when a new code is detected in two
consecutive IOM-frames. It is reset by a read of CIR0.
No change in the received Command/Indication code has been
recognized
A change in the received Command/Indication code in IOM-channel 1
has been recognized. This bit is set when a new code is detected in
one IOM-frame. It is reset by a read of CIR0.
Go
Stop
the T-SMINT
another device occupies the D- and C/I-channel
â
I itself occupies the D- and C/I-channel
125
Register Description
PEF 82902
2001-11-09