PEF82902FV11XP Lantiq, PEF82902FV11XP Datasheet - Page 144

• Manufacturer Part Number: PEF82902FV11XP
• Manufacturer: Lantiq

Specifications of PEF82902FV11XP

• Lead Free Status / Rohs Status: Supplier Unconfirmed

MSYN
MFEN
SQR1-4
4.5.6
SQXR
Value after reset: 00
MFEN
SQX1-4
Data Sheet
MSYN
7
7
0
SQXR- S/Q-Channel Transmit Register
Multi-frame Synchronization State
0 =
1 =
Multiframe Enable
Read-back of the MFEN bit of the SQXR register
0 =
1 =
Received S/Q Bits
Received Q bits in frames 1, 6, 11 and 16
Multiframe Enable
Used to enable or disable the multiframe structure.
0 =
1 =
Transmitted S/Q Bits
Transmitted S bits in frames 1, 6, 11 and 16
MFEN
MFEN
The S/T receiver has not synchronized to the received F
bits
The S/T receiver has synchronized to the received F
S/T multiframe is disabled
S/T multiframe is enabled
S/T multiframe is disabled
S/T multiframe is enabled
H
0
0
0
0
write
132
SQR1
SQX1
SQR2
SQX2
Register Description
SQR3
SQX3
Address:
A
and M bits
PEF 82902
A
2001-11-09
and M
SQR4
SQX4
0
0
35
H