PEF82902FV11XP Lantiq, PEF82902FV11XP Datasheet - Page 165
PEF82902FV11XP
Manufacturer Part Number
PEF82902FV11XP
Description
Manufacturer
Lantiq
Datasheet
1.PEF82902FV11XP.pdf
(205 pages)
Specifications of PEF82902FV11XP
Lead Free Status / Rohs Status
Supplier Unconfirmed
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4.8.4
MOCR
Value after reset: 00
MRE
MRC
MIE
MXC
Data Sheet
MRE
7
MOCR - MONITOR Control Register
0 =
1 =
MONITOR Receive Interrupt Enable
0 =
1 =
MR Bit Control
Determines the value of the MR bit:
0 =
1 =
MONITOR Interrupt Enable
0 =
1 =
MX Bit Control
Determines the value of the MX bit:
0 =
1 =
MRC
inactive
MONITOR channel Data Abort
MONITOR interrupt status MDR generation is masked.
MONITOR interrupt status MDR generation is enabled.
MR is always ‘1’. In addition, the MDR interrupt is blocked, except
for the first byte of a packet (if MRE = 1).
MR is internally controlled by the T-SMINT
MONITOR channel protocol. In addition, the MDR interrupt is
enabled for all received bytes according to the MONITOR channel
protocol (if MRE = 1).
MONITOR interrupt status MER, MDA, MAB generation is masked
MONITOR interrupt status MER, MDA, MAB generation is enabled
The MX bit is always ‘1’.
The MX bit is internally controlled by the T-SMINT
MONITOR channel protocol.
H
MIE
MXC
read/write
153
0
0
â
I according to
Register Description
Address:
â
0
I according to
PEF 82902
2001-11-09
0
0
5E
H
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