MT41J256M8DA-125:H Micron Technology Inc, MT41J256M8DA-125:H Datasheet - Page 142

• Manufacturer Part Number: MT41J256M8DA-125:H
• Manufacturer: Micron Technology Inc

Specifications of MT41J256M8DA-125:H

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Figure 57: CAS Write Latency
AUTO SELF REFRESH (ASR)
SELF REFRESH TEMPERATURE (SRT)
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
BC4
DQS, DQS#
Command
CK#
DQ
CK
ACTIVE n
T0
WRITE n
Mode register MR2[6] is used to disable/enable the ASR function. When ASR is disabled,
the self refresh mode’s refresh rate is assumed to be at the normal 85°C limit (some-
times referred to as 1X refresh rate). In the disabled mode, ASR requires the user to
ensure the DRAM never exceeds a T
bles the SRT feature listed below when the T
Enabling ASR assumes the DRAM self refresh rate is changed automatically from 1X to
2X when the case temperature exceeds +85°C. This enables the user to operate the
DRAM beyond the standard 85°C limit up to the optional extended temperature range
of +95°C while in self refresh mode.
The standard self refresh current test specifies test conditions to normal case tempera-
ture (+85°C) only, meaning if ASR is enabled, the standard self refresh current specifica-
tions do not apply (see Extended Temperature Usage (page 178)).
Mode register MR2[7] is used to disable/enable the SRT function. When SRT is disabled,
the self refresh mode’s refresh rate is assumed to be at the normal +85°C limit (some-
times referred to as 1X refresh rate). In the disabled mode, SRT requires the user to
ensure the DRAM never exceeds a T
enables ASR.
When SRT is enabled, the DRAM self refresh is changed internally from 1X to 2X, regard-
less of the case temperature. This enables the user to operate the DRAM beyond the
standard +85°C limit up to the optional extended temperature range of +95°C while in
self refresh mode. The standard self refresh current test specifies test conditions to nor-
mal case temperature (+85°C) only, meaning if SRT is enabled, the standard self refresh
current specifications do not apply (see Extended Temperature Usage (page 178)).
T1
t RCD (MIN)
NOP
AL = 5
T2
WL = AL + CWL = 11
NOP
T6
142
C
C
of +85°C while in self refresh mode unless the user
of +85°C while in self refresh unless the user ena-
CWL = 6
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
T11
C
is between +85°C and +95°C.
Indicates A Break in
Time Scale
2Gb: x4, x8, x16 DDR3 SDRAM
NOP
T12
DI
n
Mode Register 2 (MR2)
n + 1
DI
© 2006 Micron Technology, Inc. All rights reserved.
Transitioning Data
n + 2
NOP
T13
DI
n + 3
DI
Don’t Care
NOP
T14