MT41J256M8DA-125:H Micron Technology Inc, MT41J256M8DA-125:H Datasheet - Page 74

• Manufacturer Part Number: MT41J256M8DA-125:H
• Manufacturer: Micron Technology Inc

Specifications of MT41J256M8DA-125:H

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Speed Bin Tables
Table 52: DDR3-1066 Speed Bins
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
DDR3-1066 Speed Bin
CL-
Parameter
ACTIVATE to internal READ or WRITE
delay time
PRECHARGE command period
ACTIVATE-to-ACTIVATE or REFRESH
command period
ACTIVATE-to-PRECHARGE command
period
CL = 5
CL = 6
CL = 7
CL = 8
Supported CL settings
Supported CWL settings
t
RCD-
t
RP
Notes:
CWL = 5
CWL = 6
CWL = 5
CWL = 6
CWL = 5
CWL = 6
CWL = 5
CWL = 6
1.
2. The CL and CWL settings result in
3. Reserved settings are not allowed.
t
both CL and CWL requirement settings need to be fulfilled.
REFI depends on T
t
t
t
t
t
t
t
t
CK (AVG)
CK (AVG)
CK (AVG)
CK (AVG)
CK (AVG)
CK (AVG)
CK (AVG)
CK (AVG)
Symbol
t
t
RCD
t
t
RAS
RP
RC
OPER
.
13.125
13.125
50.625
1.875
1.875
74
Min
37.5
3.0
2.5
Reserved
Reserved
Reserved
Reserved
5, 6, 7, 8
-187E
7-7-7
5, 6
t
9 x
CK requirements. When making a selection of
Max
Micron Technology, Inc. reserves the right to change products or specifications without notice.
<2.5
<2.5
3.3
3.3
t
–
–
–
REFI
2Gb: x4, x8, x16 DDR3 SDRAM
1.875
Min
52.5
37.5
3.0
2.5
15
15
Reserved
Reserved
Reserved
Reserved
Reserved
5, 6, 8
8-8-8
-187
5, 6
9 x
Max
<2.5
3.3
3.3
t
–
–
–
REFI
© 2006 Micron Technology, Inc. All rights reserved.
Speed Bin Tables
Units
CK
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2, 3
t
CK,
1
2
3
2
3
3
3
2