MT41J256M8DA-125:H Micron Technology Inc, MT41J256M8DA-125:H Datasheet - Page 35

• Manufacturer Part Number: MT41J256M8DA-125:H
• Manufacturer: Micron Technology Inc

Specifications of MT41J256M8DA-125:H

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 12: I
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
Name
Timing pattern
CKE
External clock
t
t
t
t
t
t
CL
AL
CS#
Command inputs
Row/column addr
Bank addresses
DM
Data I/O
Output buffer DQ, DQS
ODT
Burst length
Active banks
Idle banks
Special notes
CK
RC
RAS
RCD
RRD
RC
2
DD
Measurement Conditions for Power-Down Currents
Notes:
Current (Slow Exit)
I
DD2P0
1. MR0[12] defines DLL on/off behavior during precharge power-down only; DLL on (fast
2. “Enabled, off“ means the MR bits are enabled, but the signal is LOW.
Power-Down
t
Enabled, off
CK (MIN) I
exit, MR0[12] = 1) and DLL off (slow exit, MR0[12] = 0).
Toggling
Midlevel
Enabled
Electrical Specifications – I
HIGH
None
LOW
LOW
LOW
LOW
LOW
Precharge
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
All
8
DD
1
Current (Fast Exit)
I
DD2P1
Power-Down
t
Enabled, off
CK(MIN) I
Toggling
Midlevel
Enabled
35
None
HIGH
LOW
LOW
LOW
LOW
LOW
Precharge
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
All
8
DD
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1
DD
Standby Current
I
Specifications and Conditions
DD2Q
t
Enabled, off
CK(MIN) I
Toggling
Midlevel
Enabled
Quiet
None
HIGH
HIGH
Precharge
LOW
LOW
LOW
LOW
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
All
8
DD
© 2006 Micron Technology, Inc. All rights reserved.
Power-Down
t
I
Enabled, off
CK (MIN) I
DD3P
Definitions
Toggling
Current
Midlevel
Enabled
None
HIGH
LOW
LOW
LOW
LOW
LOW
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
All
Active
8
DD