AM79C961AVIW AMD (ADVANCED MICRO DEVICES), AM79C961AVIW Datasheet - Page 102

• Manufacturer Part Number: AM79C961AVIW
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C961AVIW

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / Rohs Status: Not Compliant

1
2
3
4
CSR6: RCV/XMT Descriptor Table Length
Bit
15-12
11-8
102
MP_I_ENBL
MP_MODE
MP_ENBL
MP_INT
RLEN
Name
TLEN
Read/Write accessible always.
SPND is cleared by asserting
the RESET pin, reading the
RESET register, or setting the
STOP bit
Magic Packet Mode.
Setting this bit is a prerequisite
for entering the Magic Packet
mode. It also redefines the
SLEEP pin to be a Magic Packet
enable pin. Read/Write accessi-
ble always. It is cleared by as-
serting the RESET pin, or read-
ing the RESET register.
Magic Packet Enable.
This bit when set, will force the
PCnet-ISA II into the Magic
Packet mode. Read/Write ac-
cessible always. It is cleared by
asserting the RESET pin or
reading the RESET register.
Magic Packet Interrupt Enable.
Acts as an unmask bit for the
MP_INT (CSR5, bit 4). Read/
Write accessible always. It is
cleared by asserting the RESET
pin or reading the RESET regis-
ter, or setting the STOP bit.
Magic Packet Receive Interrupt.
Will be set when a Magic Packet
has been received. Writing a
“one” will clear this bit. It is
cleared by asserting the RESET
pin, or reading the RESET regis-
ter.
Contains a copy of the transmit
encoded ring length (TLEN) field
read from the initialization block
during PCnet-ISA II controller ini-
tialization. This field is written
during the PCnet-ISA II controller
initialization routine.
Read accessible only when STOP
or SPND bits are set. Write oper-
ations have no effect and should
not be performed. TLEN is only
defined after initialization.
Contains a copy of the receive
encoded ring length (RLEN)
read
block during PCnet-ISA II con-
troller initialization. This field is
written during the PCnet-ISA II
controller initialization routine.
from
Description
the
initialization
Am79C961A
7-0
CSR8: Logical Address Filter, LADRF[15:0]
Bit
15-0 LADRF[15:0]
CSR9: Logical Address Filter, LADRF[31:16]
Bit
15-0 LADRF[31:16] Logical
CSR10: Logical Address Filter, LADRF[47:32]
Bit
CSR11: Logical Address Filter, LADRF[63:48]
Bit
15-0 LADRF[63:48] Logical
15-0 LADRF[47:32] Logical
Name
Name
Name
Name
RES
Read
STOP or SPND bits are set. Write
operations have no effect and
should not be performed. RLEN is
only defined after initialization.
Reserved locations. Read as
zero. Write operations should
not be performed.
Logical Address Filter, LADRF
[15:0]. Undefined until initialized
either automatically by loading
the initialization block or directly
by an I/O write to this register.
Read/write
when STOP or SPND bits are
set.
LADRF[31:16]. Undefined until
initialized either automatically by
loading the initialization block or
directly by an I/O write to this
register.
Read/write
when STOP or SPND bits are
set.
LADRF[47:32]. Undefined until
initialized either automatically by
loading the initialization block or
directly by an I/O write to this
register.
Read/write
when STOP or SPND bits are
set.
LADRF[63:48]. Undefined until
initialized either automatically by
loading the initialization block or
directly by an I/O write to this
register.
accessible
Description
Description
Description
Description
Address
Address
Address
accessible
accessible
accessible
only
Filter,
Filter,
Filter,
when
only
only
only