AM79C961AVIW AMD (ADVANCED MICRO DEVICES), AM79C961AVIW Datasheet - Page 108
AM79C961AVIW
Manufacturer Part Number
AM79C961AVIW
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AM79C961AVIW.pdf
(206 pages)
Specifications of AM79C961AVIW
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / Rohs Status
Not Compliant
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CSR52-53: Temporary Storage
Bit
31-0
CSR54-55: Temporary Storage
Bit
31-0
CSR56-57: Temporary Storage
Bit
31-0
CSR58-59: Temporary Storage
Bit
31-0
CSR60-61: Previous Transmit Descriptor Address
Bit
31-24
23-0
CSR62-63: Previous Transmit Status and Byte
Bit
31-24 PXST
108
TMP2
TMP3
TMP4
TMP5
PXDA
Name
Name
Name
Name
Name
Name
RES
Count
Read/write accessible only when
STOP or SPND bits are set.
Temporary Storage location.
Read/write
when STOP or SPND bits are
set.
Temporary Storage location.
Read/write
when STOP or SPND bits are
set.
Temporary Storage location.
Read/write
when STOP or SPND bits are
set.
Temporary Storage location.
Read/write
when STOP or SPND bits are
set.
Reserved locations. Written as
zero and read as undefined.
Contains the previous TDRE
address pointer. The PCnet-ISA
II controller has the capability to
stack multiple transmit frames.
Read/write
when STOP or SPND bits are
set.
Previous Transmit Status. This
field is a copy of bits 15:8 of
TMD1 of the previous transmit
descriptor.
Description
Description
Description
Description
Description
Description
accessible
accessible
accessible
accessible
accessible
only
only
only
only
only
Am79C961A
23-12
11-0
CSR64-65: Next Transmit Buffer Address
Bit
31-24
23-0
CSR66-67: Next Transmit Status and Byte Count
Bit
31-24 NXST
23-12
11-0
Bit
31-0
XSTMP
NXBC
PXBC
NXBA
Name
Name
Name
RES
RES
RES
Read/write
when STOP or SPND bits are
set.
Reserved locations. Written as
zero and read as undefined.
Accessible only when STOP bit
is set.
Previous Transmit Byte Count.
This field is a copy of the BCNT
field of TMD2 of the previous
transmit descriptor.
Read/write
when STOP or SPND bits are
set.
Reserved locations. Written as
zero and read as undefined.
Contains the next transmit buffer
address from which the PC-
net-ISA II controller will transmit
an outgoing frame.
Read/write
when STOP or SPND bits are
set.
Next Transmit Status. This field
is a copy of bits 15:8 of TMD1 of
the next transmit descriptor.
Read/write
when STOP or SPND bits are
set.
Reserved locations. Written as
zero and read as undefined.
Accessible only when STOP bit
is set.
Next Transmit Byte Count. This
field is a copy of the BCNT field
of TMD2 of the next transmit
descriptor.
Read/write
when STOP or SPND bits are
set.CSR68-69: Transmit Status
Temporary Storage
Transmit
Storage location.
Read/write
when STOP or SPND bits are
set.
Description
Description
Description
Status
accessible
accessible
accessible
accessible
accessible
accessible
Temporary
only
only
only
only
only
only
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