AM79C961AVIW AMD (ADVANCED MICRO DEVICES), AM79C961AVIW Datasheet - Page 193

• Manufacturer Part Number: AM79C961AVIW
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C961AVIW

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / Rohs Status: Not Compliant

S6: After the ownership of descriptor number 2 has
C8: The PCnet-ISA II controller will perform data DMA
N2: The message on the wire ends.
been changed by the PCnet-ISA II controller, the
next driver poll of the 2nd descriptor will show
ownership granted to the CPU. The driver now
copies the data from buffer number 2 into the
“middle section” of the application buffer space.
This operation is interleaved with the C7 and C8
operations.
to the last buffer, whose pointer is pointing to
application space. Data entering the last buffer
will not need the infamous “double copy” that is
required by existing drivers, since it is being
placed directly into the application buffer space.
N2:EOM
Ethernet
activity:
Wire
N0: Packet preamble, SFD
and destination address
are arriving.
C9: Controller writes descriptor #3.
C8: Controller is performing intermittent
C7: Controller writes descriptor #2.
C6: "Last chance" lookahead to
C5: Controller is performing intermittent
C4: Lookahead to descriptor #3 (OWN).
C3: SRP interrupt is
C2: Controller writes descriptor #1.
C1: Controller is performing intermittent
C0: Lookahead to descriptor #2.
{
bursts of DMA to fill data buffer #3.
descriptor #3 (OWN).
bursts of DMA to fill data buffer #2
generated.
bursts of DMA to fill data buffer #1.
N1: 64th byte of packet
Figure 1. Look Ahead Packet Processing (LAPP) Timeline
data arrives.
}
Controller
Ethernet
activity:
Am79C961A
Buffer
Buffer
Buffer
#3
#2
#1
S7: When the driver completes the copy of buffer
C9: When the PCnet-ISA II controller has finished all
S8: The driver sees that the ownership of descriptor
S9: The application processes the received frame and
S10: The driver sets up the TX descriptor for the PC-
S10: Driver sets up TX descriptor.
S9: Application processes packet, generates TX packet.
S7: Driver polls descriptor of buffer #3.
S6: Driver copies data from buffer #2 to the application
S5: Driver polls descriptor #2.
S4: Driver copies data from buffer #1 to the application
S1: Interrupt latency.
S0: Driver is idle.
buffer.
number 2 data to the application buffer space, it
begins polling descriptor number 3.
data DMA operations, it writes status and changes
ownership of descriptor number 3.
number 3 has changed, and it calls the application
to tell the application that a frame has arrived.
generates the next TX frame, placing it into a TX
buffer.
net-ISA II controller.
Software
activity:
}
buffer.
}
}
S3: Driver writes modified application
S2: Driver call to application to
S8: Driver calls application
pointer to descriptor #3.
get application buffer pointer.
to tell application that
packethas arrived.
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