AM79C961AVIW AMD (ADVANCED MICRO DEVICES), AM79C961AVIW Datasheet - Page 191

• Manufacturer Part Number: AM79C961AVIW
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C961AVIW

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / Rohs Status: Not Compliant

Introduction of the Look-
Ahead Packet Processing (LAPP) Concept
A driver for the PCnet-ISA II controller would normally
require that the CPU copy receive frame data from the
controller’s buffer space to the application’s buffer
space after the entire frame has been received by the
controller. For applications that use a ping-pong
windowing style, the traffic on the network will be
halted until the current frame has been completely
processed by the entire application stack. This means
that the time between last byte of a receive frame
arriving at the client’s Ethernet controller and the
client’s transmission of the first byte of the next
outgoing frame will be separated by:
1. the time that it takes the client’s CPU’s interrupt
2. plus the time that it takes the client driver to pass the
3. plus the time that it takes the application to generate
4. plus the time that it takes the client driver to transfer
5. plus the time that it takes the application to process
6. plus the time that it takes the client driver to set up
The sum of these times can often be about the same
as the time taken to actually transmit the frames on the
wire, thereby yielding a network utilization rate of less
than 50%.
An important thing to note is that the PCnet-ISA II con-
troller’s data transfers to its buffer space are such that
the system bus is needed by the PCnet-ISA II controller
for approximately 4% of the time. This leaves 96% of the
system bus bandwidth for the CPU to perform some of
the inter-frame operations in advance of the completion
of network receive activity, if possible. The question then
becomes: how much of the tasks that need to be per-
formed between reception of a frame and transmission
procedure to pass software control from the current
task to the driver
header data to the application and request an
application buffer
the buffer pointer and then return the buffer pointer
to the driver
all of the frame data from the controller’s buffer
space into the application’s buffer space and then
call the application again to process the complete
frame
the frame and generate the next outgoing frame
the descriptor for the controller and then write a
TDMD bit to CSR0
APPENDIX E
Am79C961A
of the next frame can be performed before the reception
of the frame actually ends at the network, and how can
the CPU be instructed to perform these tasks during the
network reception time?
The answer depends upon exactly what is happening
in the driver and application code, but the steps that
can be performed at the same time as the receive data
are arriving include as much as the first three steps and
part of the fourth step shown in the sequence above.
By performing these steps before the entire frame has
arrived, the frame throughput can be substantially
increased.
A good increase in performance can be expected
when the first three steps are performed before the
end of the network receive operation. A much more
significant performance increase could be realized if
the PCnet-ISA II controller could place the frame
data directly into the application’s buffer space; (i.e.
eliminate the need for step four). In order to make
this work, it is necessary that the application buffer
pointer be determined before the frame has com-
pletely arrived, then the buffer pointer in the next
desriptor for the receive frame would need to be
modified in order to direct the PCnet-ISA II controller
to write directly to the application buffer. More details
on this operation will be given later.
An alternative modification to the existing system can
gain a smaller, but still significant improvement in per-
formance. This alternative leaves step four unchanged
in that the CPU is still required to perform the copy
operation, but it allows a large portion of the copy oper-
ation to be done before the frame has been completely
received by the controller, (i.e. the CPU can perform
the copy operation of the receive data from the PC-
net-ISA II controller’s buffer space into the application
buffer space before the frame data has completely ar-
rived from the network). This allows the copy operation
of step four to be performed concurrently with the ar-
rival of network data, rather than sequentially, following
the end of network receive activity.
Outline of the LAPP Flow:
This section gives a suggested outline for a driver that
utilizes the LAPP feature of the PCnet-ISA II controller.
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