IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 112

• Manufacturer Part Number: IXB28504XGBEFS
• Manufacturer: Intel

Specifications of IXB28504XGBEFS

• Lead Free Status / Rohs Status: Compliant

9.4.3
Note:
Note:
Intel NetStructure
TPS
112
®
Upgrade and Automatic Rollback” on page 133
updates the NP Module FRU Information to clear the flag that indicates the presence of
a new NPU boot parameter set. These operations are performed only if the Boot
Monitor Config Status Word indicates that none of Boot Monitor Configurations are
marked to run in “safe mode”. If the Boot Monitor Config Status Word indicates that
one of the Boot Monitor Configurations is marked to run in “safe mode”, no action is
performed and the Boot Monitor Config upgrade procedure is postponed until the next
NPU startup.
NPU Power On Self Test
The Power-On Self Test (POST) performs initialization and basic tests on the Intel
XScale
These tests are designed so that cabling to the board is not required.
POST is divided into two phases, the first of which is always executed. This first phase
cannot be repeated on user request (the only way to repeat the tests are by rebooting
the board). POST covers these basic tests:
The first phase of POST is executed by ROM code, but the main part of POST is the first
component of Boot Monitor executed after copying to DRAM.
The Boot Monitor starts operating from flash, performs basic POST, then copies itself
from flash to DRAM, and begins executing code from DRAM.
The second stage can be optionally executed and covers more specific tests. The
configuration is changed by setting long POST in flash config using the
and setting the “skip POST option” to false.
Tests belonging to the second stage can be repeated on user request using the
command line interface when the user breaks RedBoot execution by pressing ^C. The
reason for making the second stage of POST optional is to shorten the boot time (by
default, this phase of POST is disabled).
The second POST test phase covers:
• XScale core scratchpad memory
• RAM
• I
• I
• DRAM memory
• QDR SRAM and TCAM cards (if present)
• PCI bus
• UART
• DRAM
• QDR SRAM
• PCI bus
• BMC
• Ethernet slow port
• Microengines
• Slow port
• Interrupts
IXB2850 Packet Processing Boards
2
2
C (EEPROM) Interface
C (TCAM) Interface
®
core and the main baseboard components that the XScale core depends on.
for details). The Boot Monitor also
IXB2850—Network Processor Firmware
Document Number: 05-2443-006
fconfig
January 2007
command