IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 117

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
Network Processor Firmware—IXB2850
Table 53.
Table 54.
January 2007
Document Number: 05-2443-006
IPMI event data for the POST class (Continued)
The
Diagnostics class used by the NPU acting as sensor. These IPMI events messages are
generated by the extended diagnostics.
IPMI event data for the diagnostics class
Data 2
(Event)
1Dh – I
1Eh – LEDs
1Fh – Baseboard
Media Access
20h – FIC Media
Access
(IXB28504XGBEFSx
boards only)
21h – MMC#1 Media
Access – mode 1
23h – MMC#2 Media
Access – mode 1
25h – Baseboard
Media Traffic
26h – FIC Media
Traffic
(IXB28504XGBEFS
boards only)
27h – MMC#1 Media
Traffic – mode 1
29h – MMC#2 Media
Traffic – mode 1
2Bh – Telecom
Clocks
Data 2
(Event)
00h – UART
01h – DRAM
02h – QDR SRAM
04h – PCI
05h – BMC
Table 53
2
C
gives the contents of the Event Data 2 and Event Data 3 fields for the
Data 3
(Additional
Information)
Test ID / UART#
Test ID
Test ID
Test ID / Bridge#
Test ID
Data 3
(Additional
Information)
Test ID
Test ID
Test ID / Port#
Test ID / Port#
Test ID / Port#
Test ID / Port#
Test ID / Port#
Test ID / Port#
Test ID / Port#
Test ID / Port#
Test ID
Description
UART tests errors. Test IDs (4 MSb) and UART numbers are listed
in
DRAM tests errors. Test IDs (8 bits) are listed in
“Memory Tests” on page
QDR SRAM tests errors. Test IDs (8 bits) are listed in
C.1.4, “Memory Tests” on page
PCI POST errors. Test IDs (4 MSb) are listed in
Tests” on page
BMC tests errors. Test IDs (8 bits) are listed in
“BMC Tests” on page
Description
I
“I2C POST” on page
LEDs POST errors. Test IDs (8 bits) are listed in
“LED POST” on page
Baseboard Media Access POST errors. Test IDs (4 MSb) are listed
in
numbers (4LSb) start with 0.
FIC Media Access POST errors. Test IDs (4 MSb) are listed in
Section B.1.15, “Media Access POST” on page
(4 LSb) start with 0.
Media Access POST errors for MMC#1 working in mode 1 – GE or
POS. Test IDs (4 MSb) are listed in
POST” on page
Not applicable to IXB2850.
Media Access POST errors for MMC#2 working in mode 1 – GE or
POS. Test IDs (4 MSb) are listed in
POST” on page
Baseboard Media Traffic POST errors. Test IDs (4 MSb) are listed
in
numbers (4LSb) start with 0.
FIC Media Traffic POST errors. Test IDs (4 MSb) are listed in
Section B.1.16, “Media Traffic POST” on page
(4LSb) start with 0.
Media Traffic POST errors for MMC#1 working in mode 1 – GE.
Test IDs (4 MSb) are listed in
on page
Not applicable to IXB2850.
Media Traffic POST errors for MMC#1 working in mode 1 – GE or
POS. Test IDs (4 MSb) are listed in
POST” on page
Telecom Clocks POST errors. Test IDs (8 bits) are listed in
B.1.17, “Telecom Clock POST” on page
2
C POST errors. Test IDs (8 bits) are listed in
Section C.1.5, “Serial/UART Tests” on page
Section B.1.15, “Media Access POST” on page
Section B.1.16, “Media Traffic POST” on page
228. Port numbers (4LSb) start with 0.
Intel NetStructure
232. PCI bridge numbers (4LSb) start with 0.
227. Port numbers (4LSb) start with 0.
227. Port numbers (4LSb) start with 0.
228. Port numbers (4LSb) start with 0.
227.
227.
230.
230.
Section B.1.16, “Media Traffic POST”
®
230.
IXB2850 Packet Processing Boards
Section B.1.15, “Media Access
Section B.1.15, “Media Access
Section B.1.16, “Media Traffic
228.
228. Port numbers
231.
Section C.1.6, “PCI
227. Port numbers
Section B.1.13,
Section C.1.2,
Section B.1.14,
228. Port
Section C.1.4,
227. Port
Section
Section
TPS
117