IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 27

• Manufacturer Part Number: IXB28504XGBEFS
• Manufacturer: Intel

Specifications of IXB28504XGBEFS

• Lead Free Status / Rohs Status: Compliant

Hardware Overview—IXB2850
Note:
3.2
January 2007
Document Number: 05-2443-006
IXB2850 boards can also be extended using the following optional cards:
Since the PrPMC is optional, the data path from the PrPMC to the Base Interface is also
optional. See
information.
Baseboard
The baseboard contains two processors that include firmware:
The following devices on a baseboard are programmable by the Network Processor
(NP):
• QDR SRAM card or coprocessor card (for example, a TCAM)
• PrPMC Adjunct Processor (AP)
• Board Management Controller (BMC) - This processor is responsible for
• IXP2850 Network Processor (NP) - This processor is used for packet forwarding
• Intel
• Marvell* Alaska 1011 - Single Gigabit Ethernet PHY device. Four of these devices
• Intel
• Media Access Module - This module switches packets/cells between the IXP2850
communication with Shelf Management Controllers (ShMCs) via the Intelligent
Platform Management Bus (IPMB) on the backplane. It also manages power for the
entire board and provides access to the ID EEPROMs located on the baseboard and
all other cards. See
firmware details.
(microengines) as well as controlling specific devices (see below) on the baseboard
(Intel XScale
details.
NP through the Media Access Module (for packet transmission/reception) and
through the slow port for device configuration and management. The slow port is a
microprocessor interface typically used to access devices such as asynchronous
flash or ROM, but it is also used to access the 32-bit-wide microprocessor port of
the IXF1104. The slow port has an 8-bit multiplexed address and data bus, with
control lines to latch data and address. Possible IXF1104 chip configurations
include:
work as PHYs for the onboard IXF1104 chip and are connected to the IXF1104
through the GMII interface. The Alaska chip is configurable and can be managed
indirectly by the NP through the IXF1104.
the PCI bus for packet transmission/reception as well as device configuration and
management. This MAC controller is used to support the base interface on the
AdvancedTCA backplane in the PICMG 3.1 configuration.
SPI-4 bus and four SPI-3/UTOPIA buses connected to the following devices:
— Base/Fabric mode - Two ports used to support the fabric interface and two
— Fabric mode - All four ports are connected to the fabric interface (two ports to
— On-board IXF1104
— Fabric Interface Card (FIC)
— Quad Gigabit Ethernet Mezzanine Card (MMC #2)
— A second Media Mezzanine Card (MMC #1), which is not used on IXB2850
other ports used for access to the base interface on the AdvancedTCA*
backplane.
channel 1 and two ports to channel 2, or all 4 ports to channel 1).
boards.
®
®
IXF1104 - This Quad Gigabit Ethernet MAC Controller is connected to the
82546 - This Dual Gigabit Ethernet MAC Controller is fully accessible via
Figure 10, “Example data paths when using FIC” on page 30
®
core). See
Chapter 8.0, “Board Management Controller Firmware”
Chapter 9.0, “Network Processor Firmware”
Intel NetStructure
®
IXB2850 Packet Processing Boards
for firmware
for more
for
TPS
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