IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 180

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
Table 67.
Intel NetStructure
TPS
180
®
Boot Monitor console commands (Continued)
Command
fis delete
fis erase
fis free
fis init
fis list
fis load
fis lock
fis unlock
fis write
fconfig
fru addmrecord
fru delmrecord
fru mrecord
go
help
ipmi_event
load
net init
pci 8read
pci 8write
pci 16read
pci 16write
pci 32read
pci 32write
pci cfgshow
pci map
pci reg show
pci scan
ping
post all
post bmc
IXB2850 Packet Processing Boards
Description
Delete an image in the FIS directory
Erase a portion of flash memory
Display areas of flash memory that are currently not in use
Initialize the Flash Image System (FIS)
List images currently available in the FIS
Transfer an image from flash to RAM
Write-protect (lock) a portion of flash memory
Unlock a portion of flash memory
Write data from memory to flash
Manage the configuration kept in flash memory
Creates a new record in the specified FRU
Note: Available on customized boards only.
Deletes the specified record from the specified FRU
Note: Available on customized boards only.
List FRU records, dump the content of a FRU, or modify a
record in a FRU
Note: Available on customized boards only.
Execute code at a specified location
Display help information
Add an event to the system log
Download programs or data
Initialize a debug slow port Ethernet controller
Read 8-bit wide data from the configuration space of the
specified device
Write 8-bit wide data to the configuration space of the
specified device
Read 16-bit wide data from the configuration space of the
specified device
Write 16-bit wide data to the configuration space of the
specified device
Read 32-bit wide data from the configuration space of the
specified device
Write 32-bit wide data to the configuration space of the
specified device
Read and show a configuration space of the specified device.
Shows entire PCI configuration if no arguments are provided.
Show the result of the PCI bus scanning and base address
(BAR) association process
Show internal PCI controller registers of the Intel
network processor
Scan the PCI bus for devices
Verify network connectivity
Perform and show all results of the Power On Self Test
(POST)
Perform and show the results of the IPMI-Board Management
Controller communication tests
IXB2850—Boot Monitor Console Commands
®
IXP2850
Document Number: 05-2443-006
Refer to
Section A.2.27
Section A.2.28
Section A.2.29
Section A.2.30
Section A.2.31
Section A.2.32
Section A.2.33
Section A.2.34
Section A.2.35
Section A.2.36
Section A.2.37
Section A.2.38
Section A.2.39
Section A.2.40
Section A.2.41
Section A.2.42
Section A.2.43
Section A.2.44
Section A.2.45
Section A.2.46
Section A.2.47
Section A.2.48
Section A.2.49
Section A.2.50
Section A.2.51
Section A.2.52
Section A.2.53
Section A.2.54
Section A.2.55
Section A.2.56
Section A.2.57
January 2007