IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 40

• Manufacturer Part Number: IXB28504XGBEFS
• Manufacturer: Intel

Specifications of IXB28504XGBEFS

• Lead Free Status / Rohs Status: Compliant

Figure 16.
4.5.1
4.5.2
Intel NetStructure
TPS
40
Watchdog
Watchdog
BMC
NPU
®
Board reset circuit
The circuit in
board reset scenarios are described in the following sections including:
The reason for each reset is captured by the BMC and an appropriate event is placed in
the System Event Log (see
Entire Board Power-Down
An entire board can be powered down for any of the following reasons:
NPU Reset
The NPU can be reset for the following reasons:
•
•
•
•
•
• An operator initiated board power-down
• A BMC-initiated board power-down performed under ShMC control
• A BMC-controlled board power-down
• Operator initiated NPU reset
IXB2850 Packet Processing Boards
Entire Board Power-Down
NPU Reset
NPU Watchdogs
BMC Reset
BMC Watchdog
A standard hot swap board power-down operation. This operation is always
performed under the control of the ShMC.
The board power-down operation is performed under ShMC control because of a
hardware problem (for example, the detection of hardware overheating).
This operation is performed by the BMC without ShMC participation. This kind of
power-down operation is taken only in a case of a hardware problem that requires
a fast response (for example, the detection of excessive hardware overheating).
A software reset performed at the request of the operator from within the Boot
Monitor, or from the operating system (for example, following a diagnostics or
firmware upgrade).
BMC Reset
NPU Reset
Kick
Kick
Figure 16
incorporates both the BMC and the NPU. Different types of
CPLD
CPLD
Section 8.1.3.2, “Event Logging” on page
BMC
NPU
BMC Reset
NPU Reset
Slow Port
Slow Port
IXB2850—Hardware Management
Document Number: 05-2443-006
BMC
NPU
88).
January 2007