EP1AGX20CF484C6N Altera, EP1AGX20CF484C6N Datasheet - Page 138

• Manufacturer Part Number: EP1AGX20CF484C6N
• Description: IC ARRIA GX FPGA 20K 484FBGA
• Manufacturer: Altera
• Series: Arria GXr

Specifications of EP1AGX20CF484C6N

• Number Of Logic Elements/cells: 21580
• Number Of Labs/clbs: 1079
• Total Ram Bits: 1229184
• Number Of I /o: 230
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Arria™ GX
• Number Of Logic Blocks/elements: 21580
• # I/os (max): 230
• Process Technology: CMOS
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 21580
• Ram Bits: 1229184
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• No. Of Macrocells: 21580
• Family Type: Arria GX
• No. Of I/o's: 230
• Operating Frequency Max: 622.08MHz
• Operating Temperature Range: 0°C To +85°C
• Logic Case Style: BGA
• No. Of Pins: 484
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2395

4–16
Table 4–17. 2.5-V I/O Specifications
Table 4–18. 1.8-V I/O Specifications
Table 4–19. 1.5-V I/O Specifications
Arria GX Device Handbook, Volume 1
V
V
V
V
V
Notes to
(1) The Arria GX device V
(2) This specification is supported across all the programmable drive settings available for this I/O standard.
V
V
V
V
V
Notes to
(1) The Arria GX device V
(2) This specification is supported across all the programmable drive settings available for this I/O standard, as shown in
V
V
V
V
V
Notes to
(1) The Arria GX device V
(2) This specification is supported across all the programmable drive settings available for this I/O standard, as shown in the
CCIO
IH
IL
OH
OL
CCIO
IH
IL
OH
OL
CCIO
IH
IL
OH
OL
Symbol
chapter.
Architecture
(1)
(1)
Symbol
(1)
Symbol
Table
Table
Table
4–17:
4–18:
4–19:
chapter.
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
CCIO
CCIO
CCIO
Figure 4–5
respectively, for all differential I/O standards (LVDS and LVPECL).
voltage level support of 2.5 to 5% is narrower than defined in the normal range of the EIA/JEDEC standard.
voltage level support of 1.8 to 5% is narrower than defined in the normal range of the EIA/JEDEC standard.
voltage level support of 1.5 to 5% is narrower than defined in the normal range of the EIA/JEDEC standard.
Parameter
Parameter
Parameter
and
Figure 4–6
I
I
OH
OL
show receiver input and transmitter output waveforms,
= 1 mA
= –1 mA
Conditions
I
I
I
I
OH
OL
OH
OL
—
—
—
Conditions
Conditions
(2)
= 2 mA
= –2 mA
= –2 mA
= 2 mA
(2)
—
—
—
—
—
—
(2)
(2)
(2)
(2)
Minimum
0.65 × V
V
Minimum
0.65 V
0.75 V
Minimum
2.375
CCIO
–0.3
1.7
2.0
1.425
—
–0.3
1.71
–0.3
—
—
Chapter 4: DC and Switching Characteristics
– 0.45
CCIO
CCIO
CCIO
© December 2009 Altera Corporation
Maximum
Maximum
V
0.35 × V
0.35 V
0.25 V
Maximum
CCIO
2.625
1.575
4.0
0.7
0.4
—
1.89
2.25
0.45
—
—
+ 0.3
Arria GX Architecture
CCIO
CCIO
CCIO
Operating Conditions
Arria GX
Units
Units
Units
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V