EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 31
EP2AGX45DF29I5N
Manufacturer Part Number
EP2AGX45DF29I5N
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX45DF29I5N.pdf
(306 pages)
Specifications of EP2AGX45DF29I5N
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
45125
# I/os (max)
364
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
45125
Ram Bits
3565158.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
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Manufacturer:
ALTERA
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Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Arria II Devices
Logic Array Blocks
Figure 2–3. Direct Link Connection
December 2010 Altera Corporation
LAB Interconnects
Direct link
interconnect
to left
ALMs
Direct link interconnect from
The LAB local interconnect drives the ALMs in the same LAB using column and row
interconnects and the ALM outputs in the same LAB. The direct link connection
feature minimizes the use of row and column interconnects, providing higher
performance and flexibility. Adjacent LABs/MLABs, memory blocks, or DSP blocks
from the left or right can also drive the LAB’s local interconnect through the direct
link connection. Each LAB can drive 30 ALMs through fast local and direct link
interconnects. Ten ALMs are in any given LAB and ten ALMs are in each of the
adjacent LABs.
Figure 2–3
blocks, DSP blocks, or I/O element (IOE) outputs.
DSP block, or IOE output
left LAB, memory block,
MLAB
shows the direct link connection, which connects adjacent LABs, memory
Interconnect
Local
Arria II Device Handbook Volume 1: Device Interfaces and Integration
LAB
ALMs
Direct link
interconnect
to right
Direct link interconnect from
right LAB, memory block,
DSP block, or IOE output
2–3
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