AT94S40AL-25DGC Atmel, AT94S40AL-25DGC Datasheet - Page 13

• Manufacturer Part Number: AT94S40AL-25DGC
• Description: IC FPSLIC 40K GATE 25MHZ 256BGA
• Manufacturer: Atmel
• Series: FPSLIC®r

Specifications of AT94S40AL-25DGC

• Core Type: 8-bit AVR
• Speed: 16MHz
• Interface: I²C, UART
• Program Sram Bytes: 20K-32K
• Fpga Sram: 18kb
• Eeprom Size: 1M x 8
• Data Sram Bytes: 4K ~ 16K
• Fpga Core Cells: 2304
• Fpga Gates: 40K
• Fpga Registers: 2862
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 256-CABGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4.10
2314E–FPSLI–6/05
In-System Programming Applications
The AT94S Series Configurators are in-system (re)programmable (ISP). The example shown on
the following page supports the following programmer functions:
1. Read the Manufacturer’s Code and the Device Code.
While Atmel’s Secure FPSLIC Configurators can be programmed from various sources (e.g., on-
board microcontrollers or PLDs), the applications shown here are designed to facilitate users of
our ATDH2225 Configurator Programming Cable. The typical system setup is shown in
2.
The pages within the configuration EEPROM can be selectively rewritten.
This document is limited to example implementations for Atmel’s AT94S application.
Figure 4-2.
The diode connection between the AT94S’ RESET pin and the SER_EN signal allows the exter-
nal programmer to force the FPGA into a reset state during ISP. This eliminates the potential for
contention on the cSCK line. The pull-up resistors required on the lines to RESET, CON and
INIT are present on the inputs (internally) to the AT94S FPSLIC, see
2. Program the device.
3. Verify the device data.
Typical System Setup
PC
ATDH2225
Programming
Dongle
Ribbon
10-pin
Cable
10
Programming
AT94S Secure Family
Connector
In-System
Header
FPSLIC
Secure
Target System
Figure
FPSLIC
Secure
4-3.
Figure 4-
13