AT94S40AL-25DGC Atmel, AT94S40AL-25DGC Datasheet - Page 8

• Manufacturer Part Number: AT94S40AL-25DGC
• Description: IC FPSLIC 40K GATE 25MHZ 256BGA
• Manufacturer: Atmel
• Series: FPSLIC®r

Specifications of AT94S40AL-25DGC

• Core Type: 8-bit AVR
• Speed: 16MHz
• Interface: I²C, UART
• Program Sram Bytes: 20K-32K
• Fpga Sram: 18kb
• Eeprom Size: 1M x 8
• Data Sram Bytes: 4K ~ 16K
• Fpga Core Cells: 2304
• Fpga Gates: 40K
• Fpga Registers: 2862
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 256-CABGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4.8
8
No
Programming Summary:
Write to Whole Device
AT94S Secure Family
Power-Cycle EEPROM
Send Device Address
Send Device Address
Send Start Condition
Send Start Condition
Low-power (Standby)
Send Stop Condition
(Latches 1st Byte for
EEPROM Address
EEPROM Address
PAGE_COUNT
EEPROM Address
BYTE_COUNT
Send Data Byte
PAGE_COUNT+1
BYTE_COUNT+1
PAGE_COUNT
BYTE_COUNT
BYTE_COUNT =
FPGA Download
SER_EN
SER_EN
Send MSB of
Middle Byte
Send LSB of
Operations)
T_BYTE?
($A6)
START
($A7)
END
High
Low
(2)
0
0
(1)
(1)
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Value Changed Due
PAGE_COUNT =
1st Data Byte
T_PAGE?
to Write?
ACK?
ACK?
ACK?
ACK?
ACK?
ACK?
No
No
No
No
No
No
No
No
Notes:
4.8.1
AT17LV010 0000 000x
Note:
4.8.2
AT17LV010
4.8.3
AT17LV010
1. The 1-Mbit part requires three EEPROM address
2. Data byte received/sent LSB to MSB.
where X
EEPROM Address is Defined as:
T_BYTE
T_PAGE
bytes; all three bytes must be individually ACK’d by
the EEPROM.
cSCK
cSDA
cSCK
cSDA
cSCK
cSDA
cSCK
cSDA
n
START CONDITION
STOP CONDITION
DATA BIT
ACK BIT
... X
0
is (PAGE_COUNT)\b
9
x
8
x
7
x
6
x
5
x
ACK
4
x
3
x
2
x
1
x
0
000
2314E–FPSLI–6/05
0000
1024
128