AT94S40AL-25DGC Atmel, AT94S40AL-25DGC Datasheet - Page 9

IC FPSLIC 40K GATE 25MHZ 256BGA

AT94S40AL-25DGC

Manufacturer Part Number
AT94S40AL-25DGC
Description
IC FPSLIC 40K GATE 25MHZ 256BGA
Manufacturer
Atmel
Series
FPSLIC®r
Datasheet

Specifications of AT94S40AL-25DGC

Core Type
8-bit AVR
Speed
16MHz
Interface
I²C, UART
Program Sram Bytes
20K-32K
Fpga Sram
18kb
Eeprom Size
1M x 8
Data Sram Bytes
4K ~ 16K
Fpga Core Cells
2304
Fpga Gates
40K
Fpga Registers
2862
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
256-CABGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT94S40AL-25DGC
Manufacturer:
Atmel
Quantity:
10 000
4.9
2314E–FPSLI–6/05
Programming Summary:
Read from Whole Device
Low-power (Standby)
Send Device Address
Send Device Address
Send Start Condition
Send Start condition
BYTE_COUNT
EEPROM Address
EEPROM Address
Sent Stop Condition
EEPROM Address
BYTE_COUNT
BYTE_COUNT+1
SER_EN
SER_EN
Read Data Byte
Middle Byte
Send MSB of
Send LSB of
Send ACK
START
($A6)
($A7)
END
High
Low
0
(2)
(1)
(1)
Yes
Yes
Yes
Yes
Yes
Yes
No
BYTE_COUNT=
TT_BYTE?
ACK?
ACK?
ACK?
ACK?
ACK?
No
No
No
No
No
Notes:
4.9.1
AT17LV010
4.9.2
AT17LV010
1. The 1-Mbit part requires three EEPROM address
2. Data byte received/sent LSB to MSB
EEPROM Address is Defined as:
TT_BYTE
bytes; all three bytes must be individually ACK’d by
the EEPROM.
cSCK
cSDA
cSCK
cSDA
cSCK
cSDA
cSCK
cSDA
START CONDITION
STOP CONDITION
SAMPLE DATA BIT
ACK BIT
AT94S Secure Family
ACK
00 00 00 \h
131072 \d
9

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