EZ80L92AZ020SC00TR Zilog, EZ80L92AZ020SC00TR Datasheet - Page 131

• Manufacturer Part Number: EZ80L92AZ020SC00TR
• Description: IC EZ80 MPU 100LQFP
• Manufacturer: Zilog

Specifications of EZ80L92AZ020SC00TR

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 20MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: EZ80L92AZ020SC00T

PS013014-0107
UART_RxD
Baud Rate
IR_RxD
8-clock
delay
Jitter
Infrared Encoder/Decoder Signal Pins
Clock
output following a 7-clock High (1) period. Following the 3-clock Low pulse, is a 6-clock
High pulse to complete the full 16-clock data period. Data transmission is illustrated in
Figure
Due to the inherent sampling of the received IR_RXD signal by the BIt Rate Clock, some
jitter can be expected on the first bit in any sequence of data. However, all subsequent bits
in the received data stream are a fixed 16-clock periods wide.
The infrared encoder/decoder signal pins (IR_TXD and IR_RXD) are multiplexed with
General-Purpose I/O (GPIO) pins. These GPIO pins must be configured for alternate func-
tion operation for the infrared encoder/decoder to operate.
The remaining six UART0 pins (CTS0, DCD0, DSR0, DTR0, RTS0 and RI0) are not
required for use with the infrared encoder/decoder. The UART0 modem status interrupt
should be disabled to prevent unwanted interrupts from these pins. The GPIO pins corre-
sponding to these six unused UART0 pins can be used for inputs, outputs, or interrupt
sources. Recommended GPIO Port D control register settings are listed in
additional information on setting the GPIO Port modes, see
on page 38
Start Bit = 0
16-clock
26.
period
1.6 s
min. pulse
16-clock
period
Figure 26. Infrared Data Reception
Data Bit 0 = 1
16-clock
period
Data Bit 1 = 0
16-clock
period
Data Bit 2 = 1
General-Purpose Input/Output
16-clock
period
Product Specification
Infrared Encoder/Decoder
Data Bit 3 = 1
Table
66. For
125