EZ80L92AZ020SC00TR Zilog, EZ80L92AZ020SC00TR Datasheet - Page 91

• Manufacturer Part Number: EZ80L92AZ020SC00TR
• Description: IC EZ80 MPU 100LQFP
• Manufacturer: Zilog

Specifications of EZ80L92AZ020SC00TR

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 20MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: EZ80L92AZ020SC00T

PS013014-0107
Note:
Timer Reload Registers—Low Byte
The Timer Reload Register—Low Byte, described in
byte (LSB) of the 2-byte timer reload value. In CONTINUOUS mode, the timer reload
value is reloaded into the timer upon end-of-count. When RST_EN (TMRx_CTL[1]) is set
to 1 to enable the automatic reload and restart function, the timer reload value is written to
the timer on the next rising edge of the clock.
The Timer Data registers and Timer Reload registers share the same address space.
Table 35. Timer Reload Registers—Low Byte (TMR0_RR_L = 0081h,
TMR1_RR_L = 0084h, TMR2_RR_L = 0087h, TMR3_RR_L = 008Ah,
TMR4_RR_L = 008Dh, or TMR5_RR_L = 0090h)
Bit
Position
[7:0]
TMRx_DR_H
Bit
Reset
CPU Access
Note: W = Write only.
Bit
Position
[7:0]
TMRx_RR_L
00h–FFh These bits represent the High byte of the 2-byte timer data
Value
00h–FFh These bits represent the Low byte of the 2-byte timer
Value
Description
value, {TMRx_DR_H[7:0], TMRx_DR_L[7:0]}. Bit 7 is bit 15
(msb) of the 16-bit timer data value. Bit 0 is bit 8 of the 16-bit
timer data value.
W
7
0
Description
reload value, {TMRx_RR_H[7:0], TMRx_RR_L[7:0]}. Bit 7
is bit 7 of the 16-bit timer reload value. Bit 0 is bit 0 (lsb) of
the 16-bit timer reload value.
W
6
0
W
5
0
W
4
0
Table
35, stores the least significant
W
3
0
Programmable Reload Timers
Product Specification
W
2
0
eZ80L92 MCU
W
1
0
W
0
0
85