EZ80L92AZ020SC00TR Zilog, EZ80L92AZ020SC00TR Datasheet - Page 172

• Manufacturer Part Number: EZ80L92AZ020SC00TR
• Description: IC EZ80 MPU 100LQFP
• Manufacturer: Zilog

Specifications of EZ80L92AZ020SC00TR

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 20MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: EZ80L92AZ020SC00T

PS013014-0107
ZDA
ZCL
ZDA
ZCL
Operation of the eZ80L92 During ZDI Break Points
ZDI Address
ZDI Address
lsb of
lsb of
A0
7
A0
7
ZDI Block Read
A Block Read operation is initiated the same as a single-byte Read; however, the ZDI
master continues to clock in the next byte from the ZDI slave as the ZDI slave continues to
output data. The ZDI register address counter increments with each Read. If the ZDI
register address reaches the end of the Read-Only ZDI register address space (
address stops incrementing.
If the ZDI forces the CPU to break, only the CPU suspends operation. The system clock
continues to operate and drive other peripherals. Those peripherals that can operate auton-
omously from the CPU may continue to operate, if so enabled. For example, the Watchdog
Timer and Programmable Reload Timers continue to count during a ZDI break point.
Read
Read
8
8
Byte Separator
Byte Separator
Single-Bit
Single-Bit
0/1
0/1
Figure 42. ZDI Single-Byte Data Read Timing
9
9
Figure 43. ZDI Block Data Read Timing
of DATA
of DATA
Byte 1
msb
msb
D7
D7
1
1
D6
D6
2
Figure 43
2
D5
3
D5
3
illustrates the ZDI’s Block Read timing.
ZDI Data Byte
D4
ZDI Data Bytes
4
D1
7
of DATA
D3
Byte 1
5
D0
lsb
8
Byte Separator
Single-Bit
D2
6
0/1
9
D1
of DATA
Product Specification
7
Byte 2
msb
D7
1
of DATA
ZiLOG Debug Interface
D0
lsb
8
START Signal
eZ80L92 MCU
D6
End of Data
2
or New ZDI
1
20h
9
1
), the
9
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