MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 38

• Manufacturer Part Number: MC68360VR25VL
• Description: IC MPU QUICC 25MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68360VR25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Introduction
1.4 QUICC GLUELESS SYSTEM DESIGN
A fundamental design goal of the QUICC was ease of interface to other system components.
An example of this goal is a minimal QUICC design using EPROM and DRAM, shown in Fig-
ure 1-2. This system interfaces gluelessly to an EPROM and a DRAM SIMM module. It also
offers parity support for the DRAM.
Figure 1-3 shows a larger system configuration. This system offers one EPROM, one flash
EPROM, and supports two DRAM SIMMs. Depending on the capacitance on the system
bus, external buffers may be required. From a logic standpoint, however, a glueless system
is maintained.
1-8
• When porting code from the MC68302 CP to the QUICC CPM, the software writer may
mand registers. The parameter RAM of the SCCs is very similar, and most parameter
RAM register names and usage are retained. More importantly, the basic structure of a
buffer descriptor (BD) on the QUICC is identical to that of the MC68302, except for a
few new bit functions that were added. (In a few cases, a bit in a BD status word had to
be shifted.)
find that the QUICC has new options to simplify what used to be a more code-intensive
process. For specific examples, see the INIT TX AND RX PARAMETERS, GRACEFUL
STOP TRANSMIT, and CLOSE BD commands.
Figure 1-2. Minimum QUICC System Configuration
MC68360
Freescale Semiconductor, Inc.
QUICC
PRTY3–PRTY0
For More Information On This Product,
CAS3–CAS0
ADDRESS
DATA
RAS1
WE0
CS0
R/W
OE
MC68360 USER’S MANUAL
Go to: www.freescale.com
CE (ENABLE)
OE (OUTPUT ENABLE)
WE (WRITE)
DATA
ADDRESS
(FLASH OR REGULAR)
RAS
CAS3–CAS0
W (WRITE)
DATA
ADDRESS
PARITY
(OPTIONAL PARITY)
16- OR 32-BIT
DRAM SIMM
8-BIT BOOT
EPROM