MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 491
![IC MPU QUICC 25MHZ 357-PBGA](/photos/6/76/67680/mfg_mpc860_series_sml.jpg)
MC68360VR25VL
Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360VR25VL
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
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Company:
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Manufacturer:
Exar
Quantity:
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Company:
Part Number:
MC68360VR25VL
Manufacturer:
Freescale Semiconductor
Quantity:
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7.10.16.19 UART MASK REGISTER (SCCM). The SCCM is referred to as the UART mask
register when the SCC is operating as a UART. It is a 16-bit read-write register with the same
bit formats as the UART event register. If a bit in the UART mask register is a one, the cor-
responding interrupt in the event register will be enabled. If the bit is zero, the corresponding
interrupt in the event register will be masked. This register is cleared upon reset.
7.10.16.20 SCC STATUS REGISTER (SCCS). The SCCs is an 8-bit read-only register that
allows the user to monitor real-time status conditions on the RXD line. The real-time status
of the CTS and CD pins are part of the port C parallel I/O.
Bits 7–1—Reserved
ID—Idle Status
7.10.16.21 SCC UART EXAMPLE. The following list is an initialization sequence for 9600
baud, 8 data bits, no parity, and stop bit of an SCC UART operation assuming a 25-MHz
system frequency. BRG1 and SCC4 are used. The UART is configured with the RTS4,
CTS4, and CD4 pins active. In addition, the CTS4 pin is used as an automatic flow control
signal.
ID is set when the RXD pin has been a logic one for at least one full character time.
1. The SDCR (SDMA Configuration Register) should be initialized to $0740, rather than
2. Configure the port A pins to enable the TXD4 and RXD4 pins. Write PAPAR bits 6
3. Configure the port C pins to enable RTS4, CTS4, and CD4. Write PCPAR bit 3 with
4. Configure BRG1. Write BRGC1 with $010144. The DIV16
5. Connect the BRG1 clock to SCC4 using the SI. Write the R4CS bits in SICR to 000.
6. Program the CR to execute the INIT RX & TX PARAMS command for this channel.
7. Write $0740 to the SDCR to initialize the SDMA Configuration Register.
8. Connect the SCC4 to the NMSI (i.e., its own set of pins). Clear the SC4 bit in the
0 = The line is not currently idle.
1 = The line is currently idle.
being left at its default value of $0000.
and 7 with ones. Write PADIR bits 6 and 7 with zeros. Write PAODR bits 6 and 7
with zeros.
one and bits 10 and 11 with zeros. Write PCDIR bits 3, 10, and 11 with zeros. Write
PCSO bits 10 and 11 with ones.
bit is not used, and the divider is 162 (decimal). The resulting BRG1 clock is 16
the desired bit rate of the UART.
Write the T4CS bits in SICR to 000.
For instance, to execute this command for SCC1, write $0001 to the CR. This com-
mand causes the RBPTR and TBPTR parameters of the serial channel to be updated
with the new values just programmed into RBASE and TBASE.
Freescale Semiconductor, Inc.
—
7
For More Information On This Product,
—
6
MC68360 USER’S MANUAL
Go to: www.freescale.com
—
5
—
4
—
3
Serial Communication Controllers (SCCs)
—
2
—
1
ID
0
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