MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 39
![IC MPU QUICC 25MHZ 357-PBGA](/photos/6/76/67680/mfg_mpc860_series_sml.jpg)
MC68360VR25VL
Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360VR25VL
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Exar
Quantity:
160
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC68360VR25VLR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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1.5 QUICC SERIAL CONFIGURATIONS
The QUICC offers an extremely flexible set of communications capabilities. Although a full
understanding of the possibilities requires reading the appropriate sections, some of the
possibilities are shown in the following diagrams. They show possible connections between
QUICC devices. In addition, connections are often shown between QUICCs and the
MC68302 to show the compatibility between these devices.
For readability, transceivers are usually omitted in the following diagrams. For local on-
board communications, however, transceivers are often optional and depend on the proto-
col used.
Figure 1-4 shows the Ethernet LAN capability of the QUICC. An external SIA transceiver is
required to complete the interface to the media. This functionality is implemented in the
MC68160 enhanced Ethernet serial transceiver (EEST
Figure 1-3. Larger QUICC System Configuration
MC68360
QUICC
PRTY3–PRTY0
Freescale Semiconductor, Inc.
CAS3–CAS0
WE3–WE0
ADDRESS
For More Information On This Product,
DATA
RAS2
RAS1
WE0
CS0
CS7
OE
R/W
MC68360 USER’S MANUAL
Go to: www.freescale.com
BUFFER
CE (ENABLE)
OE (OUTPUT ENABLE)
WE (WRITE)
DATA
ADDRESS
8-, 16-, OR 32-BIT SRAM
E (ENABLE)
G (OUTPUT ENABLE)
W (WRITE)
DATA
ADDRESS
(FLASH OR REGULAR)
RAS
CAS3–CAS0
W (WRITE)
DATA
ADDRESS
PARITY
). The MC68160 EEST supports
8-BIT BOOT
EPROM
RAS
(OPTIONAL PARITY)
TWO DRAM SIMMs
16- OR 32-BIT
Introduction
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