CorePCI Eval Board MICROSEMI, CorePCI Eval Board Datasheet - Page 23

• Manufacturer Part Number: CorePCI Eval Board
• Description: MCU, MPU & DSP Development Tools CorePCI v5.41
• Manufacturer: MICROSEMI

Specifications of CorePCI Eval Board

• Processor To Be Evaluated: SX-A device
• Interface Type: RS-232

Notes:
1. If the Target’s IDSEL is asserted when FRAMEn is asserted and the command bus is '1011', then a configuration write cycle is
2. The Target claims the bus by asserting DEVSELn in cycle 4.
3. Data is registered into the device on the rising edge of cycle 5.
4. The single DWORD transfer completes when TRDYn is asserted in cycle 5 and de-asserted in cycle 6.
Figure 5 • Configuration Write Cycle
Notes:
1. If the Target’s IDSEL is asserted when FRAMEn is asserted and the command bus is '1010', then a configuration read cycle is
2. The Target claims the bus by asserting DEVSELn in cycle 4.
3. During cycle 7, TRDYn is asserted and valid data is driven onto the PCI bus.
4. The single DWORD transfer completes when TRDYn is de-asserted in cycle 8.
Figure 6 • Configuration Read Cycle
indicated.
indicated.
DEVSELn
FRAMEn
TRDYn
STOPn
IRDYn
IDSEL
PAR
CLK
CBE
AD
DEVSELn
FRAMEn
TRDYn
STOPn
IRDYn
IDSEL
PAR
CBE
CLK
AD
1
addr
1010
2
1
Paddr
1011
addr
3
2
Paddr
4
3
v4.0
byte enables
byte enables
data0
4
5
Pdata0
5
6
6
7
data0
7
8
8
Pd0
9
10
CorePCI v5.41
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