PI7C8140AMAE Pericom Semiconductor, PI7C8140AMAE Datasheet - Page 60

• Manufacturer Part Number: PI7C8140AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 128-QFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8140AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 128-QFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 230 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

07-0067
13.2.1 VENDOR ID REGISTER – OFFSET 00h
13.2.2 DEVICE ID REGISTER – OFFSET 00h
13.2.3 COMMAND REGISTER – OFFSET 04h
Bit
15:0
Bit
31:16
Bit
0
1
2
3
4
5
6
31 – 24
Function
Vendor ID
Function
Device ID
Function
I/O Space
Enable
Memory Space
Enable
Bus Master
Enable
Special Cycle
Enable
Memory Write
And Invalidate
Enable
VGA Palette
Snoop Enable
Parity Error
Response
Reserved
Type
RO
Type
RO
Type
RW
RW
RW
RO
RO
RW
RW
23 – 16
Description
Identifies Pericom as the vendor of this device. Hardwired as 12D8h.
Description
Identifies this device as the PI7C8140A. Reset to 8140h.
Description
0: ignore I/O transactions on the primary interface
1: enable response to I/O transactions on the primary interface
Reset to 0
0: ignore memory transactions on the primary interface
1: enable response to memory transactions on the primary interface
Reset to 0
0: do not initiate memory or I/O transactions on the primary interface and disable
response to memory and I/O transactions on the secondary interface
1: enables bridge to operate as a master on the primary interfaces for memory and
I/O transactions forwarded from the secondary interface
Reset to 0
No special cycles defined.
Bit is defined as read only and returns 0 when read
Bridge does not generate memory write and invalidate transactions except for
forwarding a transaction for another master.
Bit is implemented as read only and returns 0 when read (unless forwarding a
transaction for another master)
0: ignore VGA palette accesses on the primary
1: enable positive decoding response to VGA palette writes on the primary
interface with I/O address bits AD[9:0] equal to 3C6h, 3C8h, and 3C9h (inclusive
of ISA alias; AD[15:10] are not decoded and may be any value)
Reset to 0
0: bridge may ignore any parity errors that it detects and continue normal
operation
1: bridge must take its normal action when a parity error is detected
Reset to 0
Reserved
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Miscellaneous
Control
15 – 8
Reserved
7 – 0
2-PORT PCI-TO-PCI BRIDGE
March 20, 2007 – Revision 1.01
DWORD ADDRESS
C4h - FFh
C0h
PI7C8140A