PI7C8140AMAE Pericom Semiconductor, PI7C8140AMAE Datasheet - Page 75

• Manufacturer Part Number: PI7C8140AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 128-QFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8140AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 128-QFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 230 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

07-0067
Bit
3
4
5
6
7
8
Function
Secondary
Memory Read
Command
Alias Enable
Secondary
Memory Write
Command
Alias Enable
Primary
Memory Read
Line/Multiple
Alias Enable
Secondary
Memory Read
Line/Multiple
Alias Enable
Primary
Memory Write
and Invalidate
Command
Alias Disable
Secondary
Memory Write
and Invalidate
Command
Alias Disable
Type
RW
RW
RW
RW
RW
RW
Description
Controls bridge’s detection mechanism for matching memory read retry cycles
from the initiator on the secondary
0: exact matching for memory read retry cycles from initiator on the secondary
interface
1: alias MEMRL or MEMRM to MEMR for memory read retry cycles from
initiator on the secondary interface
Reset to 1
Controls bridge’s detection mechanism for matching non-posted memory write
retry cycles from the initiator on the primary interface
0: exact matching for non-posted memory write retry cycles from initiator on the
secondary interface
1: alias MEMWI to MEMW for non-posted memory write retry cycles from
initiator on the secondary interface
Reset to 0
Control’s bridge’s detection mechanism for matching memory read line/multiple
cycles from the initiator on the primary interface
0: exact matching for memory read line/multiple retry cycles from the initiator on
the primary interface
1: alias MEMRL to MEMRM or MEMRM to MEMRL for memory read retry
cycles from the initiator on the primary interface
Reset to 1
Control’s bridge’s detection mechanism for matching memory read line/multiple
cycles from the initiator on the secondary interface
0: exact matching for memory read line/multiple retry cycles from the initiator on
the secondary interface
1: alias MEMRL to MEMRM or MEMRM to MEMRL for memory read retry
cycles from the initiator on the secondary interface
Reset to 1
Controls bridge’s detection mechanism for matching non-posted memory write
and invalidate cycles from the initiator on the primary interface
0: When accepting MEMWI command at the primary interface, bridge converts
MEMWI to MEMW command on the destination interface
1: When accepting MEMWI command at the primary interface, bridge does not
convert MEMWI to MEMW command on the destination interface
Reset to 0
Controls bridge’s detection mechanism for matching non-posted memory write
and invalidate cycles from the initiator on the secondary interface
0: When accepting MEMWI command at the secondary interface, bridge converts
MEMWI to MEMW command on the destination interface
1: When accepting MEMWI command at the secondary interface, bridge does not
convert MEMWI to MEMW command on the destination interface
Reset to 0
Page 75 of 82
2-PORT PCI-TO-PCI BRIDGE
March 20, 2007 – Revision 1.01
PI7C8140A