M29F400FB55M3F2 Micron Technology Inc, M29F400FB55M3F2 Datasheet - Page 21

• Manufacturer Part Number: M29F400FB55M3F2
• Manufacturer: Micron Technology Inc

Specifications of M29F400FB55M3F2

• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 55ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 19/18Bit
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 125C
• Package Type: SO W
• Program/erase Volt (typ): 4.5 to 5.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Automotive
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8/16Bit
• Number Of Words: 512K/256K
• Supply Current: 20mA
• Mounting: Surface Mount
• Pin Count: 44
• Lead Free Status / Rohs Status: Compliant

2.7
2.8
2.9
2.10
2.11
Write Enable
The Write Enable, W, controls the Bus Write operation of the memory’s Command Interface.
Reset/Block Temporary Unprotect
The Reset/Block Temporary Unprotect pin can be used to apply a Hardware Reset to the
memory or to temporarily unprotect all Blocks that have been protected.
A Hardware Reset is achieved by holding Reset/Block Temporary Unprotect Low, V
least t
ready for Bus Read and Bus Write operations after t
See the Ready/Busy Output section,
Characteristics
Holding RP at V
and Erase operations on all blocks will be possible. The transition from V
slower than t
Ready/Busy Output
The Ready/Busy pin is an open-drain output that can be used to identify when the device is
performing a Program or Erase operation. During Program or Erase operations Ready/Busy
is Low, V
Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high-impedance. See
Characteristics
The use of an open-drain output allows the Ready/Busy pins from several memories to be
connected to a single pull-up resistor. A Low will then indicate that one, or more, of the
memories is busy.
Byte/Word Organization Select
The Byte/Word Organization Select pin is used to switch between the 8-bit and 16-bit Bus
modes of the memory. When Byte/Word Organization Select is Low, V
bit mode, when it is High, V
V
The V
The Command Interface is disabled when the V
Voltage, V
during power up, power down and power surges. If the Program/Erase Controller is
programming or erasing during this time then the operation aborts and the memory contents
being altered will be invalid.
CC
PLPX
CC
Supply Voltage
OL
Supply Voltage supplies the power for all operations (Read, Program, Erase etc.).
LKO
. After Reset/Block Temporary Unprotect goes High, V
. Ready/Busy is high-impedance during Read mode, Auto Select mode and
PHPHH
. This prevents Bus Write operations from accidentally damaging the data
and
and
ID
will temporarily unprotect the protected Blocks in the memory. Program
.
Figure 23.: Reset/Block Temporary Unprotect AC
Figure 23.: Reset/Block Temporary Unprotect AC
IH
, the memory is in 16-bit mode.
Table 18.: Reset/Block Temporary Unprotect AC
Table 18.: Reset/Block Temporary Unprotect AC
CC
Supply Voltage is less than the Lockout
PHEL
or t
RHEL
IH
, whichever occurs last.
, the memory will be
IL
Waveforms.
Waveforms.
, the memory is in 8-
IH
to V
ID
must be
IL
, for at
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