ATMEGA328P-20PU Atmel, ATMEGA328P-20PU Datasheet - Page 16

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ATMEGA328P-20PU

Manufacturer Part Number
ATMEGA328P-20PU
Description
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA328P-20PU

Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Program Memory Type
Flash
Program Memory Size
32KB
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Lead Free Status / Rohs Status
Compliant
7. AVR Memories
7.1
7.2
8025K–AVR–10/09
Overview
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega48P/88P/168P. The AVR architec-
ture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega48P/88P/168P features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATmega48P/88P/168P contains 4/8/16 bytes On-chip In-System Reprogrammable Flash
memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-
nized as 2/4/8 x 16. For software security, the Flash Program memory space is divided into two
sections, Boot Loader Section and Application Program Section in ATmega88P and
ATmega168P. ATmega48P does not have separate Boot Loader and Application Program sec-
tions, and the SPM instruction can be executed from the entire Flash. See SELFPRGEN
description in section
272
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega48P/88P/168P Program Counter (PC) is 11/12/13 bits wide, thus addressing the 2/4/8
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
on page 266
and ATmega168P” on page
description on Flash Programming in SPI- or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
and
page
13.
and
288for more details.
”Boot Loader Support – Read-While-Write Self-Programming, ATmega88P
”SPMCSR – Store Program Memory Control and Status Register” on page
274.
”Memory Programming” on page 290
”Self-Programming the Flash, ATmega48P”
ATmega48P/88P/168P
”Instruction Execution Tim-
contains a detailed
16

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