ATMEGA328P-20PU Atmel, ATMEGA328P-20PU Datasheet - Page 287

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ATMEGA328P-20PU

Manufacturer Part Number
ATMEGA328P-20PU
Description
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA328P-20PU

Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Program Memory Type
Flash
Program Memory Size
32KB
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Lead Free Status / Rohs Status
Compliant
26.8.15
In
Table 26-10. Boot Size Configuration, ATmega168P
Table 26-11. Read-While-Write Limit, ATmega168P
For details about these two section, see
Write Section” on page 275
Table 26-12. Explanation of Different Variables used in
Note:
8025K–AVR–10/09
BOOTSZ1
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
Table 26-10
1
1
0
0
1. Z15:Z14: always ignored
ATmega168P Boot Loader Parameters
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
Programming.
BOOTSZ0
through
”Addressing the Flash During Self-Programming” on page 279
1
0
1
0
Table
Boot
Size
128 words
256 words
512 words
1024 words
PC[12:6]
Note:
PC[5:0]
12
5
26-12, the parameters used in the description of the self programming are given.
The different BOOTSZ Fuse configurations are shown in
Pages
16
2
4
8
”NRWW – No Read-While-Write Section” on page 275
Corresponding
Application
Flash
Section
0x0000 - 0x1F7F
0x0000 - 0x1EFF
0x0000 - 0x1DFF
0x0000 - 0x1BFF
Z-value
Z13:Z7
Z6:Z1
Z13
Z6
(1)
Figure 26-3
Boot
Loader
Flash
Section
0x1F80 - 0x1FFF
0x1F00 - 0x1FFF
0x1E00 - 0x1FFF
0x1C00 - 0x1FFF
Description
Most significant bit in the Program Counter. (The Program Counter
is 13 bits PC[12:0])
Most significant bit which is used to address the words within
one page (64 words in a page requires 6 bits PC [5:0])
Bit in Z-register that is mapped to PCMSB. Because Z0 is not used,
the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB. Because Z0 is not
used, the ZPAGEMSB equals PAGEMSB + 1.
Program counter page address: Page select, for page erase and
page write
Program counter word address: Word select, for filling temporary
buffer (must be zero during page write operation)
Pages
112
16
and the Mapping to the Z-pointer, ATmega168P
for details about the use of Z-pointer during Self-
End
Application
Section
0x1F7F
0x1EFF
0x1DFF
0x1BFF
Address
0x0000 - 0x1BFF
0x1C00 - 0x1FFF
ATmega48P/88P/168P
Figure 26-2 on page
Boot Reset Address (Start Boot
Loader Section)
0x1F80
0x1F00
0x1E00
0x1C00
and
”RWW – Read-While-
277.
287

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