ATMEGA328P-20PU Atmel, ATMEGA328P-20PU Datasheet - Page 196
ATMEGA328P-20PU
Manufacturer Part Number
ATMEGA328P-20PU
Description
Manufacturer
Atmel
Datasheet
1.ATMEGA328P-20PU.pdf
(419 pages)
Specifications of ATMEGA328P-20PU
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Program Memory Type
Flash
Program Memory Size
32KB
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Lead Free Status / Rohs Status
Compliant
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19.10.5
19.11 Examples of Baud Rate Setting
8025K–AVR–10/09
UBRRnL and UBRRnH – USART Baud Rate Registers
Table 19-8.
• Bit 15:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRnH is written.
• Bit 11:0 – UBRR11:0: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four
most significant bits, and the UBRRnL contains the eight least significant bits of the USART
baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud
rate is changed. Writing UBRRnL will trigger an immediate update of the baud rate prescaler.
For standard crystal and resonator frequencies, the most commonly used baud rates for asyn-
chronous operation can be generated by using the UBRRn settings in
values which yield an actual baud rate differing less than 0.5% from the target baud rate, are
bold in the table. Higher error ratings are acceptable, but the Receiver will have less noise resis-
tance when the error ratings are high, especially for large serial frames (see
Operational Range” on page
Bit
Read/Write
Initial Value
UCPOLn
0
1
UCPOLn Bit Settings
Transmitted Data Changed (Output of
TxDn Pin)
Rising XCKn Edge
Falling XCKn Edge
R/W
15
R
–
7
0
0
R/W
14
R
–
6
0
0
Error[%]
189). The error values are calculated using the following equation:
R/W
13
R
–
5
0
0
=
⎛
⎝
BaudRate
------------------------------------------------- - 1
R/W
BaudRate
12
R
–
4
0
0
UBRRn[7:0]
Closest Match
R/W
R/W
11
3
0
0
ATmega48P/88P/168P
Received Data Sampled (Input on RxDn
Pin)
Falling XCKn Edge
Rising XCKn Edge
–
⎞
⎠
•
R/W
R/W
10
2
0
0
UBRRn[11:8]
100%
R/W
R/W
9
1
0
0
Table
R/W
R/W
”Asynchronous
8
0
0
0
19-9. UBRRn
UBRRnH
UBRRnL
196
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