MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 152

• Manufacturer Part Number: MC68HC908LD60IFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908LD60IFU

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 6MHz
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 6-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

Timer Interface Module (TIM)
11.5.4.3 PWM Initialization
Technical Data
152
NOTE:
NOTE:
In buffered PWM signal generation, do not write new pulse width values
to the currently active channel registers. Writing to the active channel
registers is the same as generating unbuffered PWM signals.
To ensure correct operation when generating unbuffered or buffered
PWM signals, use the following initialization procedure:
In PWM signal generation, do not program the PWM channel to toggle
on output compare. Toggling on output compare prevents reliable 0%
duty cycle generation and removes the ability of the channel to self-
correct in the event of software error or noise. Toggling on output
compare can also cause incorrect PWM signal generation when
changing the PWM pulse width to a new, much larger value.
1. In the TIM status and control register (TSC):
2. In the TIM counter modulo registers (TMODH:TMODL), write the
3. In the TIM channel x registers (TCHxH:TCHxL), write the value for
4. In TIM channel x status and control register (TSCx):
5. In the TIM status control register (TSC), clear the TIM stop bit,
a. Stop the TIM counter by setting the TIM stop bit, TSTOP.
b. Reset the TIM counter by setting the TIM reset bit, TRST.
value for the required PWM period.
the required pulse width.
a. Write 0:1 (for unbuffered output compare or PWM signals) or
b. Write 1 to the toggle-on-overflow bit, TOVx.
c. Write 1:0 (to clear output on compare) or 1:1 (to set output on
TSTOP.
1:0 (for buffered output compare or PWM signals) to the mode
select bits, MSxB:MSxA. (See Table 11-3.)
compare) to the edge/level select bits, ELSxB:ELSxA. The
output action on compare must force the output to the
complement of the pulse width level. (See
Timer Interface Module (TIM)
MC68HC908LD60
Freescale Semiconductor
Table
11-3.)
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Rev. 1.1