MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 267

• Manufacturer Part Number: MC68HC908LD60IFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908LD60IFU

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 6MHz
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 6-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

20.4 I/O Signals
20.4.1 OSCXCLK
20.4.2 STOP Instruction
20.4.3 COPCTL Write
20.4.4 Power-On Reset
MC68HC908LD60
Freescale Semiconductor
NOTE:
—
Rev. 1.1
A COP reset pulls the RST pin low for 32 OSCXCLK cycles and sets the
COP bit in the SIM reset status register (SRSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ is held
at V
Place COP clearing instructions in the main program and not in an
interrupt subroutine. Such an interrupt subroutine could keep the COP
from generating a reset even while the main program is not working
properly.
The following paragraphs describe the signals shown in
OSCXCLK is the crystal oscillator output signal. OSCXCLK frequency is
equal to the crystal frequency.
The STOP instruction clears the COP prescaler.
Writing any value to the COP control register (COPCTL) (see
Control
of the prescaler. Reading the COP control register returns the low byte
of the reset vector.
The power-on reset (POR) circuit clears the COP prescaler 4096
OSCXCLK cycles after power-up.
TST
. During the break state, V
Computer Operating Properly (COP)
Register) clears the COP counter and clears bits 12 through 5
TST
on the RST pin disables the COP.
Computer Operating Properly (COP)
Figure
Technical Data
20.5 COP
I/O Signals
20-1.
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