UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 168

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(2) Measurement of two pulse widths with free-running counter
166
Figure 8-26. Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
When 16-bit timer counter 0n (TM0n) is operated in free-running mode, it is possible to simultaneously measure
the pulse widths of the two signals input to the TI00n pin and the TI01n pin.
When the edge specified by bits 4 and 5 (ES00n and ES01n) of prescaler mode register 0n (PRM0n) is input
to the TI00n pin, the value of TM0n is taken into 16-bit timer capture/compare register 01n (CR01n) and an
interrupt request signal (INTTM01n) is set.
Also, when the edge specified by bits 6 and 7 (ES10n and ES11n) of PRM0n is input to the TI01n pin, the value
of TM0n is taken into 16-bit timer capture/compare register 00n (CR00n) and an external interrupt request signal
(INTTM00n) is set.
The both falling and rising edges can be specified as the valid edges for the TI00n pin and the TI01n pin by bits
4 and 5 (ES00n and ES01n) and bits 6 and 7 (ES10n and ES11n) of PRM0n, respectively.
Sampling is performed with the count clock cycle selected by prescaler mode register 0n (PRM0n), and a capture
operation is only performed when a valid level of the TI00n pin or TI01n pin is detected twice, thus eliminating
noise with a short pulse width.
PRM0n
CRC0n
TMC0n
n = 0, 1
ES11n
1
7
0
7
0
See the description of the respective control registers for details.
ES10n
1
6
0
6
0
ES01n
1
5
0
5
0
CHAPTER 8 16-BIT TIMER/EVENT COUNTERS 00, 01
(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
ES00n
1
4
0
4
0
(c) Prescaler mode register 0n (PRM0n)
TMC0n3
3
0
3
0
0
User’s Manual U14260EJ4V0UD
CRC02n
TMC0n2
2
0
1
1
CRC01n
PRM01n
0/1
1
0
0
CRC00n
PRM00n
OVF0n
0/1
0
1
Selects count clock (setting “11” is prohibited).
Specifies both edges for pulse width detection.
Specifies both edges for pulse width detection.
Free-running mode
CR00n used as capture register
Captures valid edge of TI01n pin to CR00n
CR01n used as capture register