UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 211

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UPD78F0078GK-9ET-A

Manufacturer Part Number
UPD78F0078GK-9ET-A
Description
Manufacturer
Renesas Electronics America
Datasheet

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9.6 Cautions for 8-Bit Timer/Event Counters 50, 51
(1) Timer start errors
(2) Setting STOP mode or main system clock stop mode
(3) TM5n (n = 0, 1) reading during timer operation
An error of up to one clock may occur in the time required for a match signal to be generated after timer start.
This is because 8-bit timer counter 5n (TM5n) is started asynchronously to the count pulse.
Except when TI5n input is selected, always set TCE5n = 0 before setting the STOP mode or main system clock
stop mode.
The timer may malfunction when the main system clock starts oscillating.
When reading TM5n during operation, the count clock stops temporarily, so select a count clock with a high/low-
level waveform longer than two cycles of the CPU clock. For example, in the case where the CPU clock (f
is fx, when the selected count clock is fx/4 or below, it can be read.
Remark n = 0, 1
TM5n count value
Figure 9-16. Start Timing of 8-Bit Timer Counter 5n (TM5n)
Count pulse
CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 50, 51
00H
Timer start
User’s Manual U14260EJ4V0UD
01H
02H
03H
04H
209
CPU
)

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