UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 234

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

232
13.4 A/D Converter Operation
13.4.1 Basic operations of A/D converter
<1> Select one channel for A/D conversion using analog input channel specification register 0 (ADS0).
<2> Set bit 0 (ADCE0) of A/D converter mode register 0 (ADM0) to 1 and wait for 14 s or longer.
<3> Set bit 7 (ADCS0) of the ADM0 register to 1 to start the A/D conversion operation.
<4> The voltage input to the selected analog input channel is sampled by the sample & hold circuit.
<5> When sampling has been done for a certain time, the sample & hold circuit is placed in the hold state and
<6> Bit 9 of the successive approximation register (SAR) is set. The series resistor string voltage tap is set to
<7> The voltage difference between the series resistor string voltage tap and analog input is compared by the
<8> Next, bit 8 of SAR is automatically set, and the operation proceeds to the next comparison. The series resistor
<9> Comparison is continued in this way up to bit 0 of SAR.
<10> Upon completion of the comparison of 10 bits, an effective digital result value remains in SAR, and the result
<11> Repeat steps <4> to <10>, until ADCS0 is cleared to 0.
Cautions 1. If bit 7 (ADCS0) of A/D converter mode register 0 (ADM0) is set to 1 without setting bit 0
(<4> to <10> are operations performed by hardware)
the input analog voltage is held until the A/D conversion operation is finished.
(1/2) AV
voltage comparator. If the analog input is greater than (1/2) AV
input is smaller than (1/2) AV
string voltage tap is selected according to the preset value of bit 9, as described below.
• Bit 9 = 1: (3/4) AV
• Bit 9 = 0: (1/4) AV
The voltage tap and analog input voltage are compared and bit 8 of SAR is manipulated as follows.
• Analog input voltage
• Analog input voltage < Voltage tap: Bit 8 = 0
value is transferred to and latched in A/D conversion result register 0 (ADCR0).
At the same time, the A/D conversion end interrupt request (INTAD0) can also be generated.
To stop the A/D converter, clear ADCS0 to 0.
To restart A/D conversion from the status of ADCE0 = 1, start from <3>. To restart A/D conversion from
the status of ADCE0 = 0, however, start from <2>.
2. The A/D converter stops operation in standby mode.
REF
(ADCE0) to 1, the first A/D conversion value immediately after A/D conversion has been
started may not satisfy the rated value. Take measures such as polling the A/D conversion
end interrupt request (INTAD0) and removing the first conversion results.
The same may apply if ADCS0 is set to 1 without the lapse of a wait time of 14 s (MIN.) after
ADCE0 has been set to 1. Make sure that the specified wait time elapses.
by the tap selector.
REF
REF
Voltage tap: Bit 8 = 1
REF
CHAPTER 13 A/D CONVERTER
, the MSB is reset.
User’s Manual U14260EJ4V0UD
REF
, the MSB of SAR remains set. If the analog