UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 79

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UPD78F0078GK-9ET-A

Manufacturer Part Number
UPD78F0078GK-9ET-A
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Manufacturer
Renesas Electronics America
Datasheet

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5.2.3 Special function registers (SFR)
bit manipulation instructions. The manipulatable bit units, 1, 8, and 16, depend on the special function register type.
Unlike a general-purpose register, each special function register has a special function.
They are allocated in the area FF00H to FFFFH.
The special function registers can be manipulated like the general-purpose registers, with operation, transfer and
Each manipulation bit unit can be specified as follows.
• 1-bit manipulation
• 8-bit manipulation
• 16-bit manipulation
Table 5-3 gives a list of the special function registers. The meanings of items in the table are as follows.
• Symbol
• R/W
• Manipulatable bit units
• After reset
Describe the symbol reserved by assembler for the 1-bit manipulation instruction operand (sfr.bit).
This manipulation can also be specified with an address.
Describe the symbol reserved by assembler for the 8-bit manipulation instruction operand (sfr).
This manipulation can also be specified with an address.
Describe the symbol reserved by assembler for the 16-bit manipulation instruction operand (sfrp).
When addressing an address, describe an even address.
Symbol indicating the address of a special function register. It is a reserved word in the RA78K0, and is defined
as an sfr variable using the #pragma sfr directive in the CC78K0. When using the RA78K0, ID78K0-NS, ID78K0,
or SM78K0, symbols can be written as an instruction operand.
Indicates whether the corresponding special function register can be read or written.
R/W: Read/write
R:
W:
Indicates the manipulatable bit unit (1, 8, or 16). “–” indicates a bit unit for which manipulation is not possible.
Indicates each register status upon RESET input.
Read only
Write only
CHAPTER 5 CPU ARCHITECTURE
User’s Manual U14260EJ4V0UD
77

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