ATxmega192D3 Atmel Corporation, ATxmega192D3 Datasheet - Page 118

• Manufacturer Part Number: ATxmega192D3
• Manufacturer: Atmel Corporation

Specifications of ATxmega192D3

• Flash (kbytes): 192 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 18
• Input Capture Channels: 18
• Pwm Channels: 18
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

11.15 Register Description – Virtual Port
11.15.1
11.15.2
11.15.3
8210B–AVR–04/10
DIR - Data Direction
OUT - Data Output Value
IN - Data Input Value
• Bit 7:0 - DIR[7:0]: Data Direction Register
This register sets the data direction for the individual pins in the port mapped by "VPCTRLA -
Virtual Port-map Control Register A" or "VPCTRLB - Virtual Port-map Control Register B". When
a port is mapped as virtual, accessing this register is identical to accessing the actual DIR regis-
ter for the port.
• Bit 7:0 - OUT[7:0]: Data Output value
This register sets the data output value for the individual pins in the port mapped by "VPCTRLA
- Virtual Port-map Control Register A" or "VPCTRLB - Virtual Port-map Control Register B".
When a port is mapped as virtual, accessing this register is identical to accessing the actual
OUT register for the port.
• Bit 7:0 - IN[7:0]: Data Input Value
This register shows the value present on the pins if the digital input buffer is enabled. The config-
uration of "VPCTRLA - Virtual Port-map Control Register A" or "VPCTRLB - Virtual Port-map
Control Register B" decides the value in the register. When a port is mapped as virtual, access-
ing this register is identical to accessing the actual IN register for the port.
Bit
+0x02
Read/Write
Initial Value
Bit
+0x01
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
R/W
R/W
R/W
7
0
7
0
7
0
R/W
R/W
R/W
6
0
6
0
6
0
R/W
R/W
R/W
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
OUT[7:0]
DIR[7:0]
IN[7:0]
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
XMEGA D
R/W
R/W
R/W
0
0
0
0
0
0
OUT
DIR
IN
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