ATxmega192D3 Atmel Corporation, ATxmega192D3 Datasheet - Page 165
ATxmega192D3
Manufacturer Part Number
ATxmega192D3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega192D3
Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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15.3.4
15.3.5
15.3.6
8210B–AVR–04/10
INTFLAGS - RTC Interrupt Flag Register
TEMP - RTC Temporary Register
CNTH - Real Time Counter Register H
• Bits 7:2 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 1 - COMPIF: RTC Compare Match Interrupt Flag
This flag is set on the next count after a Compare Match condition occurs. The flag is cleared
automatically when RTC compare match interrupt vector is executed. The flag can also be
cleared by writing a one to its bit location.
• Bit 0 - OVFIF: RTC Overflow Interrupt Flag
This flag is set on the count after a overflow condition occurs. The flag is cleared automatically
when RTC overflow interrupt vector is executed. The flag can also be cleared by writing a one to
its bit location.
• Bits 7:0 - TEMP[7:0]: Real Time Counter Temporary Register
This register is used for 16-bit access to the counter value, compare value and top value regis-
ters. The low byte of the 16-bit register is stored here when it is written by the CPU. The high
byte of the 16-bit register is stored when low byte is read by the CPU. For more details refer to
”Accessing 16-bits Registers” on page
The CNTH and CNTL register pair represents the 16-bit value CNT. CNT counts positive clock
edges on the prescaled RTC clock. Reading and writing 16-bit values require special attention,
refer to
Due to synchronization between RTC clock and the system clock domains, there is a latency of
two RTC clock cycles from updating the register until this has an effect. Application software
needs to check that the SYNCBUSY flag in the
on page 164
Bit
+0x03
Read/Write
Initial Value
Bit
+0x04
Read/Write
Initial Value
Bit
+0x09
Read/Write
Initial Value
”Accessing 16-bits Registers” on page 12
is cleared before writing to this register.
R/W
R/W
R
7
–
0
7
0
7
0
R/W
R/W
R
6
–
0
6
0
6
0
R/W
R/W
R
5
–
0
5
0
5
0
12.
R/W
R/W
R
4
–
0
4
0
4
0
TEMP[7:0]
CNT[15:8]
”STATUS - Real Time Counter Status Register”
for details.
R/W
R/W
3
–
R
0
3
0
3
0
R/W
R/W
2
–
R
0
2
0
2
0
COMPIF
R/W
R/W
R/W
1
0
1
0
1
0
XMEGA D
OVFIF
R/W
R/W
R/W
0
0
0
0
0
0
INTFLAGS
TEMP
CNTH
165
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