ATxmega192D3 Atmel Corporation, ATxmega192D3 Datasheet - Page 148
ATxmega192D3
Manufacturer Part Number
ATxmega192D3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega192D3
Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Manufacturer
Quantity
Price
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CYPRESS
Quantity:
101
Company:
Part Number:
ATxmega192D3-AU
Manufacturer:
ATMEL
Quantity:
70
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Part Number:
ATxmega192D3-H
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SQ
Quantity:
719
Company:
Part Number:
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Manufacturer:
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Quantity:
565
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13. Hi-Res - High Resolution Extension
13.1
13.2
8210B–AVR–04/10
Features
Overview
•
•
•
•
The High-Resolution (Hi-Res) Extension can be used to increase the resolution of the waveform
generation output from a Timer/Counter by four (two bits). It can be used during Frequency and
PWM generation, and also in combination with the corresponding AWeX.
The Hi-Res Extension uses the Peripheral 4x Clock. The System Clock prescalers must be set
up so the Peripheral 4x Clock frequency is four times higher than the Peripheral and CPU clock
frequency (see
Extension is enabled.
Figure 13-1. Timer/Counter operation with Hi-Res Extension enabled
The Hi-Res Extension is implemented by letting the Timer/Counter run at 4x its normal speed.
When Hi-Res Extension is enabled, the counter will ignore its two lowest significant bits (LSB)
and count by four for each Peripheral clock cycle. Overflow/Underflow and Compare match of
the 14 most significant bits (LSB) is done in the Timer/Counter. Count and Compare of the two
LSB is then handled and compared in the Hi-Res Extension running from the Peripheral 4x
clock.
The two LSB of the Period register must always be set to zero to ensure correct operation. If the
Count register is read, the two LSB will always be read as zero since the Timer/Counter run from
the Peripheral clock.
The Hi-Res Extension has narrow pulse deletion preventing output of any pulse shorter than one
Peripheral clock cycle, e.g. a compare value lower than foure will have no visible output.
Increases Waveform Generator Resolution by 4x (2 bits)
Supports Frequency generation, and single and dual-slope PWM operation
Supports Dead-Time Insertion (AWeX)
Supports Pattern Generation (AWeX)
PER[15:2]
CCBUFx[15:0]
CNT[15:2]
CCx[15:2]
”System Clock Selection and Prescalers” on page
=
"match"
BOTTOM
[1:0]
= 0
0
0
2
Generation
Time/Counter
Waveform
=
TOP
2
AWeX
Dead-Time
Insertion
DTI
clk
PER
59) when the Hi-Res
Generation
Protection
Pattern
Fault
XMEGA D
2
clk
HiRes
PER4
Pnx
148
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