ATxmega192D3 Atmel Corporation, ATxmega192D3 Datasheet - Page 241
ATxmega192D3
Manufacturer Part Number
ATxmega192D3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega192D3
Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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20.13 Register Description - ADC Channel
20.13.1
8210B–AVR–04/10
CTRL - ADC Channel Control Register
• Bit 7 - START: START Conversion on Channel
Writing this to one will start a conversion on the channel. The bit is cleared by hardware when
the conversion has started. Writing this bit to one when it already is set will have no effect. Writ-
ing or reading these bits is equivalent to writing the CH0START bit in
Register A” on page
• Bits 6:5 - Reserved
These bits are unused and reserved for future use. For compatibility reasons always write these
bits to zero when this register is written.
• Bits 4:2 - GAIN[2:0]: ADC Gain Factor
These bits define the gain factor in order to amplify input signals before the ADC conversion.
See
settings, see
Table 20-5.
• Bit 1:0 - INPUTMODE[1:0]: ADC Input Mode
These bits define the ADC Channel input mode. This setting is independent of the ADC CONV-
MODE (signed/unsigned mode) setting, but differential input mode can only be done in ADC
signed mode. In single ended input mode, the negative input to the ADC will be connected to a
fixed value both for ADC signed and unsigned mode.
Bit
+0x00
Read/Write
Initial Value
Table 20-5 on page 241
GAIN[2:0]
000
001
010
011
100
101
110
111
START
”MUXCTRL - ADC Channel MUX Control registers” on page
R/W
7
0
ADC Gain Factor
234.
R
6
–
0
Group Configuration
for different gain factor settings. Gain is only valid with certain MUX
R
5
–
0
DIV2
16X
32X
64X
1X
2X
4X
8X
R/W
4
0
GAIN[2:0}
R/W
3
0
R/W
2
0
Gain factor
R/W
INPUTMODE[1:0]
1
0
1/2x
16x
32x
64x
”CTRLA - ADC Control
1x
2x
4x
8x
242.
XMEGA D
R/W
0
0
CTRL
241
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