AD7938 Analog Devices, AD7938 Datasheet - Page 22

• Manufacturer Part Number: AD7938
• Description: 8-Channel, 1.5 MSPS, 12-Bit Parallel ADCs with a Sequencer
• Manufacturer: Analog Devices

Specifications of AD7938

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 1.5MSPS
• Interface: Byte,Par
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: (2Vref) p-p,5V p-p,Uni (Vref),Uni (Vref) x 2,Uni 2.5V,Uni 5.0V
• Adc Architecture: SAR
• Pkg Type: CSP,QFP

AD7938/AD7939
Another method of driving the AD7938/AD7939 is to use the
AD8138
single-ended-to-differential amplifier or as a differential-to-
differential amplifier. The device is as easy to use as an op amp
and greatly simplifies differential signal amplification and
driving.
Pseudo Differential Mode
The AD7938/AD7939 can have four pseudo differential pairs
(Pseudo Mode 1) or seven pseudo differential inputs (Pseudo
Mode 2) by setting the MODE0 and MODE1 bits in the control
register to 1, 0 and 1, 1, respectively. In the case of the four
pseudo differential pairs, V
which must have an amplitude of V
on the range chosen) to make use of the full dynamic range of
the part. A dc input is applied to the V
applied to this input provides an offset from ground or a pseudo
ground for the V
differential inputs, the seven analog input signals inputs are
referred to a dc voltage applied to V
GND
V
GND
REF
Figure 29. Dual Op Amp Circuit to Convert a Single-Ended Unipolar Signal
2 × V
V
REF
Figure 28. Dual Op Amp Circuit to Convert a Single-Ended
REF
differential amplifier. The AD8138 can be used as a
p-p
p-p
Bipolar Signal into a Differential Unipolar Signal
220Ω
440Ω
20kΩ
440Ω
20kΩ
A
A
IN+
input. In the case of the seven pseudo
220Ω
220Ω
220Ω
220Ω
220Ω
220Ω
into a Differential Signal
+
+
10kΩ
10kΩ
V+
V–
V+
V–
V+
V–
V+
V–
IN+
is connected to the signal source,
27Ω
27Ω
27Ω
27Ω
REF
IN7
.
IN−
(or 2 × V
pin. The voltage
3.75V
2.5V
1.25V
3.75V
2.5V
1.25V
3.75V
2.5V
1.25V
3.75V
2.5V
1.25V
REF
depending
V
V
V
V
IN+
IN–
AD7938/
AD7939
IN+
IN–
AD7938/
AD7939
0.47µF
0.47µF
V
V
REF
REF
Rev. C | Page 22 of 36
The benefit of pseudo differential inputs is that they separate
the analog input signal ground from the ADC ground, allowing
dc common-mode voltages to be cancelled. Typically, this range
can extend from −0.3 V to +0.7 V when V
+1.8 V when V
for pseudo differential mode.
ANALOG INPUT SELECTION
As shown in Table 10, users can set up their analog input
configuration by setting the values in the MODE0 and MODE1
bits in the control register. Assuming the configuration has been
chosen, there are different ways of selecting the analog input to
be converted depending on the state of the SEQ and SHDW bits
in the control register.
Traditional Multichannel Operation (SEQ = SHDW = 0)
Any one of eight analog input channels or four pairs of channels
can be selected for conversion in any order by setting the SEQ
and SHDW bits in the control register to 0. The channel to be
converted is selected by writing to the address bits, ADD2 to
ADD0, in the control register to program the multiplexer prior
to the conversion. This mode of operation is that of a traditional
multichannel ADC where each data write selects the next
channel for conversion. Figure 31 shows a flowchart of this
mode of operation. The channel configurations are shown in
Table 10.
*ADDITIONAL PINS OMITTED FOR CLARITY.
V
REF
Figure 31. Traditional Multichannel Operation Flow Chart
Figure 30. Pseudo Differential Mode Connection Diagram
ISSUE CONVST PULSE TO INITIATE A CONVERSION
CHANGING THE VALUES OF BITS ADD2 TO ADD0
p-p
INITIATE A WRITE CYCLE TO SELECT THE NEXT
IN THE CONTROL REGISTER. SEQ = SHDW = 0.
INITIATE A READ CYCLE TO READ THE DATA
SET SEQ = SHDW = 0. SELECT THE DESIRED
SET UP OPERATING MODE, ANALOG INPUT
CHANNEL TO CONVERT (ADD2 TO ADD0).
WRITE TO THE CONTROL REGISTER TO
DD
FROM THE SELECTED CHANNEL.
CHANNEL TO BE CONVERTED BY
AND OUTPUT CONFIGURATION.
ON THE SELECTED CHANNEL.
= 5 V. Figure 30 shows a connection diagram
POWER ON
VOLTAGE
DC INPUT
DD
V
V
V
REF
IN+
IN–
= 3 V or −0.3 V to
+
AD7938/
AD7939*
0.47µF
Data Sheet