MD4331-d1G-MECH M-Systems Inc., MD4331-d1G-MECH Datasheet - Page 2

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MD4331-d1G-MECH

Manufacturer Part Number
MD4331-d1G-MECH
Description
Mobile Diskonchip G3 Data Sheet
Manufacturer
M-Systems Inc.
Datasheet
Performance
Protection & Security-Enabling Features
Reliability and Data Integrity
2
MultiBurst read: 80 MB/sec
Erase: 30 MB/sec
Sustained read: 5 MB/sec
Sustained write: 1.1 MB/sec
Access time:
16-byte Unique Identification (UID)
number
6KByte user-controlled One Time
Programmable (OTP) area
Two configurable hardware-protected
partitions for data and code:
Hardware- and software-driven, on-the-fly
EDC and ECC algorithms
4-bit Error Detection Code/Error Correction
Code (EDC/ECC), based on a patented
combination of BCH and Hamming code
algorithms, tailored for MLC NAND flash
technology
Guaranteed data integrity after power
failure
Transparent bad-block management
Dynamic and static wear-leveling
Normal: 55 nsec
Turbo: 33 nsec
MultiBurst: 25 nsec
Read-only mode
Write-only mode
One-Time Write mode (ROM-like)
partition
Protection key and LOCK# signal
Sticky Lock (SLOCK) to lock boot
partition
Protected Bad Block Table
Data Sheet, Rev. 1.0
Boot Capability
Hardware Compatibility
Programmable Boot Block with XIP
capability to replace boot NOR
Download Engine (DE) for automatic
download of boot code from Programmable
Boot Block
Boot options:
Asynchronous Boot mode to boot from
ARM-based CPUs, e.g. XScale, TI OMAP,
without the need for external glue logic
Exceptional boot performance with
MultiBurst operation and DMA support
enhanced by external clock
Configurable interface: simple NOR-like or
multiplexed address/data interface
CPU compatibility, including:
Supports 8-, 16- and 32-bit architectures
2KB for 512Mb devices
4KB for 1Gb devices
CPU initialization
Platform initialization
OS boot
ARM-based CPUs
Texas Instruments OMAP
Intel StrongARM/XScale
Motorola DragonBall MX1
Qualcomm MSMxxxx
AMD Alchemy
Motorola PowerPC™ MPC8xx
Philips PR31700
Hitachi SuperH™ SH-x
NEC VR Series
Mobile DiskOnChip G3
91-SR-011-05-8L

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