MD4331-d1G-MECH M-Systems Inc., MD4331-d1G-MECH Datasheet - Page 64

• Manufacturer Part Number: MD4331-d1G-MECH
• Description: Mobile Diskonchip G3 Data Sheet
• Manufacturer: M-Systems Inc.

61
Read/Write
Description
Reset Value
Bit No.
15-10
9-0
NEGATE_COUNT. When the EDGE bit of DMA Control register[0] is a 0, this bit must be
Reserved for future use.
programmed to specify the bus cycle in which DMARQ# will be negated as follows:
NEGATE_COUNT = BYTES_REMAINING + 16 + BYTES_PER_CYCLE.
Example: To negate DMARQ# at the beginning of the cycle in which the last word is to be
transferred by a 16-bit host: NEGATE_COUNT = 2 + 16 + 2 = 20.
0
0
Bits 15-10
RFU_0
R
DMA Control Register [1]
Data Sheet, Rev. 1.0
0
Description
0
0
NEGATE_COUNT
0
Bits 9-0
R/W
Mobile DiskOnChip G3
0
91-SR-011-05-8L
0