MD4331-d1G-MECH M-Systems Inc., MD4331-d1G-MECH Datasheet - Page 90

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MD4331-d1G-MECH

Manufacturer Part Number
MD4331-d1G-MECH
Description
Mobile Diskonchip G3 Data Sheet
Manufacturer
M-Systems Inc.
Datasheet
87
t
(Muxed Mode Only)
SU
1.
2.
3.
4.
5.
6.
7.
t
T
P
(DPD/RSTIN-AVD)
REC
t
(DPD/RSTIN-D)
T
D (Read cycle)
P
SU
VCCQ = 1.65 or 2.5V
(VCC-BUSY0)
T
T
T
Specified from the final positive crossing of VCC above 2.7V and VCCQ above 1.65 or 2.5V.
If the assertion of RSTIN# occurs during a flash erase cycle, this time could be extended by up to 500 µS.
Normal read/write cycle timing applies. This parameter applies only when the cycle is extended until the negation of the BUSY# signal.
Applies to multiplexed interface only.
Applies to SRAM mode only.
DPD transition refers to exiting Deep Power Down mode by toggling DPD (A[0]).
When operating Mobile DiskOnChip G3 with separate power supplies for VCC and VCCQ, it is recommended to turn both supplies on
and off simultaneously. Providing power separately (either at power-on or power-off) can cause excessive power dissipation. Damage to
the device may result if this condition persists for more than 1 second.
P
P
DPD (A[0])
W
CE#, OE#
(WE# = 1)
Symbol
(VCC-RSTIN)
(D-BUSY1)
(BUSY0)
(BUSY1)
VCC = 2.5V
(RSTIN)
RSTIN#
BUSY#
A[12:0]
AVD#
VCC
5,6
4,6
VCC/VCCQ stable to RSTIN#
RSTIN# asserted pulse width
RSTIN#
RSTIN#
Data valid to BUSY#
VCC/VCCQ stable to BUSY#
DPD transition or RSTIN#
DPD transition or RSTIN#
T
T
SU
P
Table 20: Power-Up Timing Parameters
(VCC-BUSY0)
T
(DPD/RSTIN-AVD)
T
REC
P
(DPD/RSTIN-D)
(VCC-RSTIN)
Figure 33: Reset Timing
to BUSY#
to BUSY#
Data Sheet, Rev. 1.0
Description
3
T
2
P
(BUSY1)
to AVD#
to Data valid
1
T
VALID
SU
(D-BUSY1)
Min
500
600
660
30
0
T
P
(BUSY0)
1055
Max
Mobile DiskOnChip G3
T
500
50
W
(RSTIN)
91-SR-011-05-8L
Units
nS
nS
µs
ns
ns
µs
ns
µs

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