MT9074 Mitel Networks Corporation, MT9074 Datasheet - Page 39

• Manufacturer Part Number: MT9074
• Description: T1/E1/J1 Single Chip Transceiver
• Manufacturer: Mitel Networks Corporation

Advance Information
The alarm reporting latch (address 12H page 04H)
contains a register whose bits are set high for
selected alarms. These bits stay high until the
register is read. This allows the controller to record
intermittent or sporadic alarm occurrences.
Automatic Alarms
In E1 mode the transmission of RAI and signalling
multiframe
automatically from control bits ARAI and AUTY
(page 01H, address 10H). When ARAI = 0 and basic
frame synchronization is lost (SYNC = 1), the
MT9074 will automatically transmit the RAI alarm
signal to the far end of the link. The transmission of
this alarm signal will cease when basic frame
alignment is acquired.
When AUTY = 0 and signalling multiframe alignment
is not acquired (MFSYNC = 1), the MT9074 will
automatically transmit the multiframe alarm (Y-bit)
signal to the far end of the link. This transmission will
cease when signalling multiframe alignment is
acquired.
Detected Events and Words
T1 mode
Severely Errored Frame Event
In T1 mode bit 5 page 3H address 10H toggles
whenever a sliding window detects 2 framing errors
events (Ft or ESF) in a sliding window of 6.
Loop Code Detect
T1.403 defines SF mode line loopback activate and
deactivate codes. These codes are either a framed
or un-framed repeating bit sequence of 00001 for
activation or 001 for deactivation. The standard goes
on to say that these codes will persist for five
seconds or more before the loopback action is taken.
In T1 mode MT9074 will detect both framed and
unframed line activate and de-activate codes even in
the presence of a BER of 3 x 10-3. Line Loopback
Disable Detect - LLDD - in the Alarm Status Word
•
more than a millisecond or when more than
192 zeros have been received in a row. A
loss of signal condition will terminate when
an average ones density of at least 12.5%
has been received over a period of 255
contiguous pulse positions starting with a
pulse.
Remote Signalling Multiframe Alarm - (Y-bit)
of the multiframe alignment signal.
alarms
can
be
made
to
function
(bit 0 address 11H of page 3H) will be asserted when
a repeating 001 pattern (either framed or unframed)
has persisted for 48 milliseconds. Line Loopback
Enable Detect LLED in the Alarm Status Word will be
asserted when a repeating 00001 pattern (either
framed
milliseconds.
Pulse Density Violation Detect
In T1 mode bit 2 of address 11H on page 3H (PDV)
toggles if the receive data fails to meet ones density
requirements. It will toggle upon detection of 16
consecutive zeros on the line data, or if there are
less than N ones in a window of 8(N+1) bits - where
N = 1 to 23.
Timer Outputs
In T1 mode MT9074 has a one second timer derived
from the 20 Mhz oscillator pins. The timer may be
used
performance messaging.
E1 mode
Consecutive Frame Alignment Patterns (CONFAP)
Two consecutive frame alignment signals in error.
Receive Frame Alignment Signals
These bits are received on the PCM 30 and link in bit
positions two to eight of time slot 0 - frame alignment
signal. These signals form the frame alignment
signal and should be 0011011.
Receive Non Frame Alignment Signal
This signal is received on the PCM 30 and link in bit
position two of time slot 0 - non frame alignment
signal.
Receive Multiframe Alignment Signals
These signal are received on the PCM 30 and link in
bit position one to four of time slot 16 of frame zero
of every signalling multiframe.
Interrupts
The MT9074 has an extensive suite of maskable
interrupts, which are divided into four categories
based on the type of event that caused the interrupt.
Each interrupt has an associated mask and interrupt
bit. When an unmasked interrupt event occurs, IRQ
will go low and one or more bits of the appropriate
interrupt register will go high. After each interrupt
register is read it is automatically cleared. When all
to
or
trigger
unframed)
interrupts
has
persisted
for
MT9074
T1.403/408
for
48
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