MT9074 Mitel Networks Corporation, MT9074 Datasheet - Page 75

• Manufacturer Part Number: MT9074
• Description: T1/E1/J1 Single Chip Transceiver
• Manufacturer: Mitel Networks Corporation

Advance Information
Bit
7
6
5
4
3
2
1
0
Table 89 - Signalling Control Word (E1)
EXTOSC External Oscillator Select. Setting
CNTCLR Counter Clear. If one, all status
SAMPLE One Second Sample. Setting this
Name
SPND
RST
INTA
RSV
- - -
(Page 1, Address 1AH)
Reset. When this bit is changed
from zero to one the device will
reset to its default mode. See the
Reset Operation section for the
default settings.
Suspend Interrupts. If one, the
IRQ output (pin 12 in PLCC, 85 in
MQFP) will be in a high-impedance
state and all interrupts will be
ignored. If zero, the IRQ output will
function normally.
Interrupt Acknowledge. A zero-to-
one or one-to-zero transition will
clear any pending interrupt and
make IRQ high impedance.
counters are cleared and held low.
Zero for normal operation.
bit
(change of frame alignment, loss of
frame alignment, bpv errors, crc
errors,
events and multiframes out of sync)
to be updated on one second
intervals coincident with the one
second
address 12H bit 7).
this bit connects the pin OSC1 to a
TTL compatible input. This allows
for a system design employing a
TTL output oscillator as a 20.000
Mhz reference clock.
Reserved. Must be kept at 0 for
normal operation.
Unused.
causes
Functional Description
severely
timer
the
(status
error
errored
page
counters
frame
3
Bit
7
6
5
4
3
2
Table 90 - Interrupt Mask Word Zero (E1)
MFSYIM
CSYNIM
SYNIM
LOSIM
CEFIM
Name
AISIM
(Page 1, Address 1BH)
Synchronization
Mask. When unmasked (SYNI=1)
an interrupt is initiated whenever
change of state of basic frame
synchronization condition exists.
If 1 - unmasked, 0 - masked.
Multiframe
Interrupt Mask. When unmasked
(MFSYI=1),
initiated whenever a change of
state
nization is lost. If 1 - unmasked, 0
- masked.
CRC-4
Synchronization
Mask.
(CSYNI=1),
initiated whenever a change of
state of
synchronization exists. If 1 -
unmasked, 0 - masked.
Alarm
Interrupt Mask. When unmasked
(AISI=1) a change of state of
received AIS will initiate an
interrupt. If 1 - unmasked, 0 -
masked.
Loss of Signal Interrupt Mask.
When unmasked this interrupt bit
goes high whenever a change of
state of loss of signal (either
analog - received signal 20 or 40
dB below nominal or digital - 192
consecutive
condition exists. If 1 - unmasked,
0 - masked.
Consecutively Errored FASs
Interrupt Mask. When unmasked
an interrupt is initiated when two
consecutive
alignment signals are received. If
1 - unmasked, 0 - masked.
Functional Description
of
Indication
multiframe
When
CRC-4 multiframe
an
an
Synchronization
errored
0’s
MT9074
interrupt
interrupt
Multiframe
unmasked
Interrupt
Interrupt
received)
synchro-
Signal
frame
is
is
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