MT90500 Mitel Semiconductor, MT90500 Datasheet - Page 17

• Manufacturer Part Number: MT90500
• Description: Multi-Channel ATM AAL1 SAR
• Manufacturer: Mitel Semiconductor

2.8
The MT90500 provides a wide variety of interrupt source bits, allowing for easy monitoring of MT90500
operation. All interrupt source bits, including the module level interrupt bits, have an associated mask bit which
enables or disables assertion of the interrupt pin. This enables the user to tailor the interrupt pin activity to the
application. Interrupt source bits are set regardless of the state of the associated mask bit, so even source bits
which are disabled from causing an interrupt pin assertion may be polled by the CPU by reading the
appropriate register.
2.8.1
The following interrupt bits are used to indicate which MT90500 circuit module is the source of the interrupt.
They are set when one or more interrupt source bits in the particular circuit module is set. The CPU can find
the source of an interrupt by reading the register containing these bits and then reading the indicated module’s
interrupt register.
2.8.2
2.8.3
2.8.4
2.8.5
Interrupts
Module Level Interrupts
TX_SAR Interrupts
RX_SAR Interrupts
UTOPIA Interrupts
TDM Interrupts
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IEEE 1149 (JTAG) Boundary-Scan Test Access Port for testing board-level interconnect.
Packaging: 240-pin PQFP.
TX_SAR Module Interrupt
RX_SAR Module Interrupt
UTOPIA Module Interrupt
TDM Module Interrupt
Timing (TDM Clock Generation) Module Interrupt
Transmit Non-CBR Data Cell FIFO Overrun Interrupt
Scheduler error (Indicates that the TX_SAR has too heavy a work load.)
AAL1-byte Parity Error Interrupt
AAL1-byte CRC Error Interrupt
AAL1-byte Sequence Number Error Interrupt
Pointer-byte Parity Error Interrupt
Pointer-byte Out of Range Error Interrupt
Underrun Error Interrupt
Overrun Error Interrupt
Miscellaneous Counter Rollover Interrupt
Underrun Counter Rollover Interrupt
Overrun Counter Rollover Interrupt
Receive Non-CBR Data Cell FIFO Overrun Interrupt
RX UTOPIA Module Internal FIFO Overrun Interrupt
Receive Non-CBR Data Cell FIFO Receive Cell Interrupt
Clock Absent Interrupt
Clock Fail Interrupt
TDM Out of Bandwidth Interrupt
MT90500
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